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IDT72V8981 Datasheet

  • IDT72V8981

  • 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128

  • 11頁(yè)

  • IDT

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3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
128 x 128
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
IDT72V8981
128 x 128 channel non-blocking switch
Serial Telecom Bus Compatible (ST-BUS
廬
)
4 RX inputs鈥?2 channels at 64 Kbit/s per serial line
4 TX output鈥?2 channels at 64 Kbit/s per serial line
Three-state serial outputs
Microprocessor Interface (8-bit data bus)
3.3V Power Supply
Available in 44-pin Plastic Leaded Chip Carrier (PLCC), and
44-pin Plastic Quad Flatpack (PQFP)
擄
擄
Operating Temperature Range -40擄C to +85擄C
3.3V I/O with 5V Tolerant Inputs
outputs, each of which consists of 32 channels (64 Kbit/s per channel) to form
a multiplexed 2.048 Mb/s stream.
FUNCTIONAL DESCRIPTION
A functional block diagram of the IDT72V8981 device is shown below. The
serial streams operate continuously at 2.048 Mb/s and are arranged in 125碌s
wide frames each containing 32, 8-bit channels. Four input (RX0-3) and four
output (TX0-3) serial streams are provided in the IDT72V8981 device allowing
a complete 128 x 128 channel non-blocking switch matrix to be constructed.
The serial interface clock (C4i) for the device is 4.096 MHz.
The received serial data is internally converted to a parallel format by the
on chip serial-to-parallel converters and stored sequentially in a 128-position
Data Memory. By using an internal counter that is reset by the input 8 KHz frame
pulse,
F0i,
the incoming serial data streams can be framed and sequentially
addressed.
Data to be output on the serial streams may come from two sources: Data
Memory or Connection Memory. The Connection Memory is 16 bits wide and
DESCRIPTION:
The IDT72V8981 is a ST-BUS
廬
compatible digital switch controlled by a
microprocessor. The IDT72V8981 can handle as many as 128, 64 Kbit/s input
and output channels. Those 128 channels are divided into 4 serial inputs and
FUNCTIONAL BLOCK DIAGRAM
C4i
F0i
V
CC
GND
ODE
Timing
Unit
RX0
RX1
RX2
RX3
Output MUX
TX0
Receive
Serial Data
Streams
Data
Memory
Control Register
Connection
Memory
Transmit
Serial Data
Streams
TX1
TX2
TX3
Microprocessor Interface
5702 drw01
DS
CS
R/W A0/
DTA
D0/
A5
D7
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS
錚?/div>
is a trademark of Mitel Corp.
AUGUST 2003
DSC-5702/4
1
錚?/div>
2003 Integrated Device Technology, Inc.
All rights reserved.
Product specifications subject to change without notice.

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