tation and change, while providing high performance and
integrated functionality.
Designers configure the ispPAC10 and verify its perfor-
mance using PAC-Designer
廬
, an easy-to-use, Microsoft
Windows
廬
compatible development tool. Device pro-
gramming is supported using PC parallel port I/O
operations. A library of configurations is included with basic
solutions and examples of advanced circuit techniques.
The ispPAC10 is configured through its IEEE Standard
1149.1 (JTAG) compliant serial port. The flexible In-
System Programming capability enables programming,
verification and reconfiguration if desired, directly on the
printed circuit board.
OA
OA
15 OUT3+
Typical Application Diagram
5V
Vin
5V
12-Bit
Differential
Input ADC
Ain+
Ain-
Ref+
Ref-
ispPAC10
Copyright 漏 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
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