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STE26N50 Datasheet

  • STE26N50

  • N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR IN ISOTOP ...

  • 8頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STE26N50
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
TYPE
STE26N50
s
s
V
DSS
500 V
R
DS( on)
< 0.2
鈩?/div>
I
D
26 A
4
3
s
s
s
s
s
s
s
HIGH CURRENT POWER MODULE
AVALANCHE RUGGED TECHNOLOGY
(SEE IRFP450 FOR RATING)
VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
EASY TO MOUNT
SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
EXTREMELY LOW R
th
JUNCTION TO CASE
VERY LOW DRAIN TO CASE CAPACITANCE
VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
1
2
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
INDUSTRIAL APPLICATIONS:
s
SMPS & UPS
s
MOTOR CONTROL
s
WELDING EQUIPMENT
s
OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
D S
V
DG R
V
GS
I
D
I
D
I
D M
(鈥?
P
tot
T
stg
T
j
V
ISO
Parameter
Drain-Source Voltage (V
GS
= 0)
Drain-Gate Voltage (R
GS
= 20 k鈩?
Gate-Source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25
o
C
Derating Factor
Storage Temperature
Max. Operating Junction Temperature
Insulation Withstand Voltage (AC-RMS)
o
Value
500
500
鹵
20
26
17
104
300
2.4
-55 to 150
150
2500
Unit
V
V
V
A
A
A
W
W/
o
C
o
o
C
C
V
(鈥? Pulse width limited by safe operating area
July 1993
1/8

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