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STE2002_06 Datasheet

  • STE2002_06

  • 81 x 128 single-chip LCD controller/driver

  • 61頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STE2002
81 x 128 single-chip LCD controller/driver
Features
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈥?Eight selectable temperature compensation
coefficients
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鈻?/div>
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104 x 128 bits Display Data RAM
Programmable MUX rate
Programmable frame rate
X,Y Programmable carriage return
Dual partial display mode
Row by Row Scrolling
Automatic data RAM Blanking procedure
Selectable Input interface:
鈥?I
2
C Bus Fast and Hs-mode (read and write)
鈥?Parallel Interface (read and write)
鈥?Serial Interface (read and write)
Fully Integrated oscillator requires no external
components
CMOS compatible inputs
Fully integrated configurable LCD bias voltage
generator with:
鈥?Selectable multiplication factor (up to 6
X
)
鈥?Effective sensing for High Precision Output
Designed for chip-on-glass (COG) applications
Low power consumption, suitable for battery
operated systems
Logic supply voltage range from 1.7 to 3.6V
High voltage generator supply voltage range
from 1.75 to 4.2V
Display supply voltage range from 4.5 Vto
14.5V
Backward compatibility with STE2001
Description
The STE2002 is a low power CMOS LCD
controller driver. Designed to drive a 81 rows by
128 columns graphic display, provides all
necessary functions in a single chip, including on-
chip LCD supply and bias voltages generators,
resulting in a minimum of externals components
and in a very low power consumption. The
STE2002 features three standard interfaces
(Serial, Parallel & I
2
C) for ease of interfacing with
the host microcontroller.
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Block diagram
CO to C127
R0 to R80
ICON
OSC_IN
OSC_OUT
OSC
TIMING
GENERATOR
CLOCK
COLUMN
DRIVERS
ROW
DRIVERS
VLCDIN
BIAS VOLTAGE
GENERATOR
DATA
LATCHES
SHIFT
REGISTER
VLCDSENSE
VLCDOUT
HIGH VOLTAGE
GENERATOR
RES
VSSAUX
VDD1,2
V
SS
SEL1,2
RESET
104 x 128
RAM
SCROLL
LOGIC
TEST_1_14
TEST
DATA
REGISTER
INSTRUCTION
REGISTER
DISPLAY
CONTROL
LOGIC
ICON_MODE
EXT
BSY_FLG
SA1
I2CBUS
SOUT
PARALLEL
SERIAL
SAO
SCL
SDA_IN
SDA_OUT DB0 to DB7 E
R/W PD/C SCE
SDIN
SCLK
SD/C
December 2006
Rev 3
1/61
www.st.com
61

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