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ST92195B

32-64K ROM HCMOS MCU WITH

ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER

DATA BRIEFING

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Register File based 8/16 bit Core Architecture

with RUN, WFI, SLOW and HALT modes

0擄C to +70擄C operating temperature range

Up to 24 MHz. operation @ 5V鹵10%

Min. instruction cycle time: 165ns at 24 MHz.

32, 48, 56 or 64 Kbytes ROM

256 bytes RAM of Register file (accumulators or

index registers)

256 bytes of on-chip static RAM

2, 6 or 8 Kbytes of TDSRAM (Teletext and

Display Storage RAM)

28 fully programmable I/O pins

Serial Peripheral Interface

Flexible Clock controller for OSD, Data Slicer

and Core clocks running from a single low

frequency external crystal.

Enhanced display controller with 26 rows of

40/80 characters

鈥?Serial and Parallel attributes

鈥?10x10 dot matrix, 512 ROM characters, defin-

able by user

鈥?4/3 and 16/9 supported in 50/60Hz and 100/

120 Hz mode

鈥?Rounding, fringe, double width, double height,

scrolling, cursor, full background color, half-

intensity color, translucency and half-tone

modes

Teletext unit, including Data Slicer, Acquisition

Unit and up to 8 Kbytes RAM for data storage

VPS and Wide Screen Signalling slicer (on

some devices)

Integrated Sync Extractor and Sync Controller

14-bit Voltage Synthesis for tuning reference

voltage

Up to 6 external interrupts plus one Non-

Maskable Interrupt

8 x 8-bit programmable PWM outputs with 5V

open-drain or push-pull capability

16-bit watchdog timer with 8-bit prescaler

One 16-bit standard timer with 8-bit prescaler

4-channel A/D converter; 5-bit guaranteed

PSDIP56

TQFP64

See end of document for ordering information

Rich instruction set and 14 addressing modes

s

Versatile

development

tools,

including

Assembler, Linker, C-compiler, Archiver,

Source Level Debugger and hardware

emulators with Real-Time Operating System

available from third parties

s

Pin-compatible EPROM and OTP devices

available

Device Summary

s

Device

ST92195B1

ST92195B2

ST92195B3

ST92195B4

ST92195B5

ST92195B6

ST92195B7

ST92T195B7

ST92E195B7

Program

Memory

32K ROM

32K ROM

32K ROM

48K ROM

48K ROM

56K ROM

64K ROM

64K OTP

64K EPROM

TDS VPS/

RAM WSS

2K

6K

6K

6K

8K

8K

8K

8K

8K

Yes

No

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Package

PSDIP56/

TQFP64

CSDIP56

/CQFP64

Rev. 2.5

January 2000

1/22

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