Rds(on)=0.020鈩?/div>
6" Wafer
Electrical Characteristics ( Wafer Form )
Parameter
V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
T
J
T
STG
Description
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Leakage
Operating Junction and
Storage Temperature Range
Guaranteed (Min/Max)
40V Min.
0.020鈩?Max.
0.030鈩?Max.
1.0V Min., 3.0V Max.
25碌A(chǔ) Max.
鹵 15碌A(chǔ) Max.
175擄C Max.
Test Conditions
V
GS
= 0V, I
D
= 250碌A(chǔ)
V
GS
= 10V, I
D
= 5.0A
V
GS
= 4.5V, I
D
= 5.0A
V
DS
= V
GS
, I
D
= 250碌A(chǔ)
V
DS
= 55V, V
GS
= 0V, T
J
= 25擄C
V
GS
= 鹵16V
Mechanical Data
Nominal Backmetal Composition, Thickness:
Nominal Front Metal Composition, Thickness:
Dimensions:
Wafer Diameter:
Wafer thickness:
Relevant Die Mechanical Dwg. Number
Minimum Street Width
Reject Ink Dot Size
Recommended Storage Environment:
Recommended Die Attach Conditions
Reference Standard IR packaged part ( for design ) : IRLBL1304
Cr-NiV-Ag ( 1kA擄-2kA擄-2.5kA擄 )
99% Al, 1% Si (0.004 mm)
0.181" x 0.303" ( 4.6mm x 7.7 mm)
150mm, with std. < 100 > flat
.014" + / -.003"
01-5298
0.1 mm
0.13mm Diameter Minimum, 0.51mm Max.
Store in original container, in dessicated
nitrogen, with no contamination
For optimum electrical results, die attach
temperature should not exceed 300C
Die Outline
3/23/99
1
