PowerPC鈩?/div>
Integrated Device Technology, Inc.
IDT7MPV6253
IDT7MPV6255/56
FEATURES
鈥?For CHRP based PowerPC鈩?systems.
鈥?Asynchronous and pipelined burst SRAM options in the
same module pinout
鈥?Low-cost, low-profile card edge module with 178 leads
鈥?Uses Burndy Computerbus鈩?connector, part number
ELF182KSC-3Z50
鈥?Operates with external PowerPC CPU speeds up to
66MHz
鈥?Separate 5V (鹵5%) and 3.3V (+10/-5%) power supplies
鈥?Multiple GND pins and decoupling capacitors for maxi-
mum noise immunity
鈥?Presence Detect output pins allow the system to deter-
mine the particular cache configuration.
x 8 asynchronous static RAMs and the IDT7MPV6255/56 use
IDT鈥檚 71V432 32K x 32 pipelined synchronous burst static
RAMs in plastic surface mount packages mounted on a
multilayer epoxy laminate (FR-4) board. In addition, each of
the modules uses the IDT 71216 16K x 15 Cache-Tag static
RAM and IDT FCT logic. Extremely high speeds are achieved
using IDT鈥檚 high-reliability, low cost CMOS technology.
The low profile card edge package allows 178 signal leads
to be placed on a package 5.06" long, a maximum of 0.250"
thick and a maximum of 1.08" tall. The module space savings
versus discrete components allows the OEM to design addi-
tional functions onto the system or to shrink the size of the
motherboard for reduced cost.
All inputs and outputs are LVTTL-compatible, and operate
from separate 5V (鹵5%) and 3.3V (+10/-5%) power supplies.
Multiple GND pins and on-board decoupling capacitors en-
sure maximum protection from noise.
DESCRIPTION
The IDT7MPV6253/55/56 modules belong to a family of
secondary caches intended for use with PowerPC CPU-
based systems. The IDT7MPV6253 uses IDT鈥檚 71V256 32K
FUNCTIONAL BLOCK DIAGRAM
IDT7MPV6253 鈥?256KB ASYNCHRONOUS VERSION
A
14
- A
26
ALE
ADDR
A0
ADDR
A1
SRAM OE
1
WE#
0
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
8
13
Latch
13
PD
0
PD
1
PD
2
ADDR
A0
ADDR
A1
SRAM OE
0
DH
0
- DH
7
WE#
4
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
32K x 8
Asynchronous
SRAM
8
PD
3
DL
0
- DL
7
WE#
1
8
DH
8
- DH
15
WE#
5
8
DL
8
- DL
15
WE#
2
8
DH
16
- DH
23
WE#
6
8
DL
16
- DL
23
WE#
3
STANDBY
A
14
- A
26
TWE#
TOE#
STANDBY
TCLR#
TVALID
DIRTYIN
CLK
2
13
8
DH
24
- DH
31
WE#
7
STANDBY
12
8
DL
24
- DL
31
A
2
- A
13
TMATCH
8K x 12
Tag Field
8K x 2
Status
DIRTYOUT
drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc. PowerPC is a trademark of IBM. Computerbus is trademark of Burndy.
COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
JUNE 1996
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