Advanced 64-bit
Microprocessors
Product Family
Features
High-performance 64-bit embedded Microprocessor
鈥?250MHz operating frequency
鈥?>330 Dhrystone MIPS performance
鈥?300MFLOPS/s floating-point performance
鈥?Up to 125 million multiply accumulate per second (MAC/s)
鈥?MIPS-IV Instruction Set Architecture (ISA), with integer DSP
and 3-operand integer multiply extensions
鈥?Limited dual-issue microarchitecture
x
Compatible with RC4640 and RC32364 DSP extensions
鈥?DSP Extensions, for consumer applications
鈥?2-cycle repeat rate, on atomic Multiply-add
鈥?Multiply-subtract (MSUB) support, for complex number
processing
鈥?Count-leading-zero/one support, for string searches and
normalization
x
High-performance on-chip cache subsystem
鈥?32kB, two-set associative instruction cache (I-cache)
鈥?32kB, two-set associative data cache (D-cache)
鈥?Write-through and write-back data cache operations
鈥?High-performance cache-ops, bandwidth management
x
I-cache and D-cache locking capability (per line), provides
improved real-time support
x
Joint TLB on-chip, for virtual-to-physical address mapping
x
x
79RC64574
鈩?/div>
79RC64575
鈩?/div>
Big- or Little-endian capability
x
RC5000 compatible memory management
鈥?On-chip 48-entry, 96-page TLB, for advanced operating
system support
鈥?Compatible with major operating systems:
Windows
廬
CE, VxWorks, and others
x
Bus compatible with IDT 64-bit microprocessor families
鈥?Pipeline runs at 2 to 8 times the bus frequency
鈥?Bus speeds to 125MHz
鈥?32-bit bus option, for lower cost systems
鈥?Enhanced timing protocol for SyncDRAM systems (compatible
with IDT79RC64474/475)
x
RC64574:
鈥?32-bit SysAd bus, for low-cost systems
鈥?Pin compatible with RC4640 and RC64474
鈥?128-pin QFP package
x
RC64575:
鈥?64-bit SysAd bus interface
鈥?Pin compatible with RC4650 and RC64475
鈥?208-pin QFP package
x
Industrial temperature range support
x
JTAG Boundary Scan Interface
x
2.5V operation with 3.3V tolerant I/O
Diagra
agram
Block Diagram
PLL
64-bit
Integer
Execution Unit
DSP
Accelerator
RC5000
Dual-Issue Instruction Fetch Unit
Primary Cache Controller
Compatible
System Control
Coprocessor
48-entry
96-page
TLB
Floating-Point
Accelerator
666 MFIOPS
IEEE 1284
32kB
2 set-associative
Instruction
Cache
(Lockable)
32kB
2 set-associative
Data
Cache
(Lockable)
64-bit/32-bit
RC64474/475 Compatible
System Interface
ClkIn
Figure 1 RC64574/RC64575 Block Diagram
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
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錚?/div>
2001 Integrated Device Technology, Inc.
December 14, 2001
DSC 5607
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