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IDT79RV4650-133DPI Datasheet

  • IDT79RV4650-133DPI

  • EMBEDDED 64-BIT ORION ? RISC MICROPROCESSOR

  • 501.52KB

  • 25頁

  • IDT

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Low-Cost 64-bit
RISController
w/DSP Capability
)HDWXUHV
)HDWXUHV
x
x
IDT79RC4650
鈩?/div>
High-performance embedded 64-bit microprocessor
鈥?64-bit integer operations
鈥?64-bit registers
鈥?100MHz, 133MHz, 150 MHz, 180MHz, 200MHz and 267MHz
operation frequencies
x
High-performance DSP capability
鈥?133.5 Million Integer Multiply-Accumulate Operations/sec @
267 MHz
x
High-performance microprocessor
鈥?133.5 M Mul-Add/second at 267MHz
鈥?89 MFL0P/s at 250MHz
鈥?>640,000 dhrystone (2.1)/sec capability at 267MHz
(352 dhrystone MIPS)
x
High level of integration
鈥?64-bit, 267 MHz integer CPU
鈥?8KB instruction cache; 8KB data cache
鈥?Integer multiply unit with 133.5M Mul-Add/sec
x
Low-power operation
鈥?Active power management powers-down inactive units
鈥?Standby mode
x
Upwardly software compatible with IDT RISController
Family
Large, efficient on-chip caches
鈥?Separate 8kB Instruction and 8kB Data caches
鈥?Over 3200MB/sec bandwidth from internal caches
鈥?2-set associative
鈥?Write-back and write-through support
鈥?Cache locking to facilitate deterministic response
x
Bus compatible with RC4000 family
鈥?System interface provides bandwidth up to 1000 MB/S
鈥?Direct interface to 32-bit wide or 64-bit wide systems
鈥?Synchronized to external reference clock for multi-master
operation
鈥?Socket compatible with IDT RC64475 and RC64575
x
Improved real-time support
鈥?Fast interrupt decode
Optional cache locking
x
Note:鈥淩鈥?refers to 5V parts; 鈥淩V鈥?refers to 3.3V parts; 鈥淩C鈥?/div>
refers to both
%ORFN#'LDJUDP
352 M IP S 64-bit C P U
64-bit register file
System C on trol C oprocessor
A d dress Tran slation/
C ache A ttribu te C ontrol
89M F L O P S Sin gle-P recision F PA
FP register file
P ip elin e C o n tro l
L oad aligner
S tore A ligner
Logic U nit
H igh-Perform an ce
In teger M u ltiply
Exception M an agem en t
F u nctions
P ip e lin e C o n tro l
64-b it ad der
P ack /U n pack
F P A dd /S ub /C vt/
D iv/S qrt
FP M ultiply
C ontrol B us
D ata Bu s
Instru ction Bu s
Instru ction C ach e
S et A
(Lock able)
In stru ctio n C a che
Set B
3 2 -/6 4 -b it
S y n c h ro n ize d
S y ste m In ter fa ce
D ata C ach e
S et A
(Lockable)
Data Cache
Set B
The IDT logo is a registered trademark and ORION, RC4600, RC4650, RV4650, RC4700, RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trademarks of Integrated Device Technology, Inc.
1 of 25
漏
2000 Integrated Device Technology, Inc.
March 28, 2000
DSC 3149/3

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