音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

IDT74GTLP16612 Datasheet

  • IDT74GTLP16612

  • CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER

  • IDT

掃碼查看芯片數(shù)據手冊

上傳產品規(guī)格書

PDF預覽

IDT74GTLP16612
CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
CMOS 18-BIT TTL/GTLP
UNIVERSAL BUS
TRANSCEIVER
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Bidirectional interface between GTLP and TTL logic levels
Edge Rate Control Circuit reduces output noise
V
REF
pin provides reference voltage for receiver threshold
CMOS technology for low power dissipation
Special PVT Compensation circuitry to provide consistent perfor-
mance over variations of process, supply voltage, and temperature
5V tolerant inputs and outputs on A-Port
Bus-Hold to eliminate the need for external pull-up resistors for
unused inputs to A-Port
Power up/down high-impedance
TTL-compatible Driver and Control inputs
High Output source/sink 鹵32mA on A-Port pins
Flow-through architecture optimizes system layout
D-type latch and flip-flop architecture for data flow in clocked,
transparent, or latched mode
Open drain on GTLP to support wired OR connection
Available in SSOP and TSSOP packages
IDT74GTLP16612
DESCRIPTION:
The GTLP16612 is an 18-bit universal bus transceiver. It provides
signal level translation, from TTL to GTLP, for applications requiring a high-
speed interface between cards operating at TTL logic levels and back-
planes operating at GTLP logic levels. GTLP provides reduced output
swing (<1V), reduced input threshold levels, and output edge-rate control
to minimize signal setting times. The GTLP16612 is a derivative of the Gun-
ning Transceiver Logic (GTL) JEDEC standard JESD8-3 and incorporates
internal edge-rate control, which is process, voltage, and temperature
(PVT) compensated.
GTLP output low voltage is less than 0.5V. The output high is 1.5V, and
the receiver threshold is 1V.
FUNCTIONAL BLOCK DIAGRAM
OEAB
1
CEAB
56
CLKAB
55
LEAB
2
LEBA
28
CLKBA
30
CEBA
29
OEBA
27
ONE OF 18 CHANNELS
CE
1D
C1
CE
1D
C1
CLK
CLK
A1
3
GTLP
54
B1
TO 17 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
1999
Integrated Device Technology, Inc.
OCTOBER 1999
DSC-5477/2

IDT74GTLP16612相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
    IDT [Integ...
  • 英文版
    x8 Dual-Port SRAM
    IDT
  • 英文版
    HIGH-SPEED 128K x 8 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 128K x 8 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    x16 Dual-Port SRAM
    IDT
  • 英文版
    HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 32K x 18 DUAL-PORT STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 2K x 8 FourPort STATIC RAM
    IDT
  • 英文版
    HIGH-SPEED 2K x 8 FourPort STATIC RAM
    IDT [Integrated...
  • 英文版
    HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM
    IDT

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經采納，將有感恩紅包奉上哦！