FST32xxx 鈥?28鈩?/div>
鈥?TTL-compatible input and output levels
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?Available in QSOP, TSSOP, SOIC and PDIP
DESCRIPTION:
The FST3383/32383 belong to IDT's family of Bus Switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of
their own while providing a low resistance path for an external
driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this
FET is adequately forward-biased the device conducts and
the resistance between input and output ports is small. With-
out adequate bias on the gate-to-source junction of the FET,
the FET is turned off, therefore with no V
CC
applied, the device
has hot insertion capability.
The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.
The FST32383 integrates terminating resistors in the de-
vice, thus eliminating the need for external 25鈩?series resis-
tors.
The FST3383 and FST32383 each provide four 5-bit TTL-
compatible ports that support 2 way bus exchange. The BX
pin controls the bus exchange and the
BE
pin serves as the
enable pin.
FUNCTIONAL BLOCK DIAGRAM
A
0
C
0
PIN CONFIGURATION
BE
C
0
1
2
3
4
5
6
7
8
9
10
11
12
DIP/SOIC/
QSOP/TSSOP
TOP VIEW
24
23
22
21
20
P24-1
SO24-2
SO24-8
SO24-9
19
18
17
16
15
14
13
Vcc
D
4
B
4
A
4
C
4
D
3
B
3
A
3
C
3
D
2
B
2
BX
3258 drw 02
B
0
D
0
A
0
B
0
A
4
C
4
D
0
C
1
B
4
B
X
BE
D
4
A
1
B
1
D
1
3258 drw 01
C
2
A
2
PIN DESCRIPTION
Pin Names
A
0-4
, B
0-4
C
0-4
, D
0-4
I/O
I/O
I/O
I
I
Description
Buses A, B
Buses C, D
Bus Switch Enable (Active LOW)
Bus Exchange
3258 tbl 01
GND
BE
BX
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
10.4
DSC-3258/3
1