FST32xxx 鈥?28鈩?/div>
鈥?TTL-compatible input and output levels
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?Available in QSOP, TSSOP, SOIC and PDIP
鈥?Pin-compatible with FCT244/FCT244T
DESCRIPTION:
The FST3244/32244 belong to IDT's family of Bus switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of
their own while providing a low resistance path for an external
driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this
FET is adequately forward-biased the device conducts or the
resistance between input and output ports is small. Without
adequate bias on the gate-to-source junction of the FET, the
FET is turned off, therefore with no V
CC
applied, the device
has hot insertion capability.
The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.
The FST32244 integrates terminating resistors in the de-
vice, thus eliminating the need for external 25鈩?series resis-
tors.
The FST3244 and FST32244 are octal TTL-compatible
bus switches. The
OE
pins provide output enable control for
all 8 bits.
FUNCTIONAL BLOCK DIAGRAM
OE
A
DA
0
DA
1
DA
2
DA
3
OA
0
OA
1
OA
2
OA
3
PIN CONFIGURATION
OE
A
DA
0
OB
0
DA
1
OB
1
1
2
3
4
5
6
7
8
9
10
DIP/SOIC/
QSOP/TSSOP
TOP VIEW
P20-1
SO20-2
SO20-8
SO20-9
20
19
18
17
16
15
14
13
12
11
Vcc
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
OE
B
DB
0
DB
1
DB
2
DB
3
OB
0
OB
1
OB
2
OB
3
3255 drw 01
DA
2
OB
2
DA
3
OB
3
GND
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
DA
0-3
, OA
0-3
DB
0-3
, OB
0-3
Description
Output Enable Inputs (Active LOW)
A Port Bits
B Port Bits
3255 tbl 03
3255 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
10.1
DSC-3255/3
1
1
2
3
4
5
