Integrated Device Technology, Inc.
FAST CMOS OCTAL
TRANSPARENT
LATCHES
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT
IDT54/74FCT533T/AT/CT
IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FEATURES:
鈥?Common features:
鈥?Low input and output leakage
鈮?碌A(chǔ)
(max.)
鈥?CMOS power levels
鈥?True TTL input and output compatibility
鈥?V
OH
= 3.3V (typ.)
鈥?V
OL
= 0.3V (typ.)
鈥?Meets or exceeds JEDEC standard 18 specifications
鈥?Product available in Radiation Tolerant and Radiation
Enhanced versions
鈥?Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
鈥?Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
鈥?Features for FCT373T/FCT533T/FCT573T:
鈥?Std., A, C and D speed grades
鈥?High drive outputs (-15mA I
OH
, 48mA I
OL
)
鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Features for FCT2373T/FCT2573T:
鈥?Std., A and C speed grades
鈥?Resistor output
(-15mA I
OH
, 12mA I
OL
Com.)
(-12mA I
OH
, 12mA I
OL
Mil.)
鈥?Reduced system switching noise
DESCRIPTION:
The FCT373T/FCT2373T, FCT533T and FCT573T/
FCT2573T are octal transparent latches built using an ad-
vanced dual metal CMOS technology. These octal latches
have 3-state outputs and are intended for bus oriented appli-
cations. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the set-up time is latched. Data appears on the bus
when the Output Enable (
OE
) is LOW. When
OE
is HIGH, the
bus output is in the high- impedance state.
The FCT2373T and FCT2573T have balanced drive out-
puts with current limiting resistors. This offers low ground
bounce, minimal undershoot and controlled output fall times-
reducing the need for external series terminating resistors.
The FCT2xxxT parts are plug-in replacements for FCTxxxT
parts.
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT373T/2373T AND IDT54/74FCT573T/2573T
D
0
D
O
G
G
D
1
D
O
G
D
2
D
O
G
D
3
D
O
G
D
4
D
O
G
D
5
D
O
G
D
6
D
O
G
D
7
D
O
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
2564 cnv* 01
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT533T
D
0
D
O
G
G
D
1
D
O
G
D
2
D
O
G
D
3
D
O
G
D
4
D
O
G
D
5
D
O
G
D
6
D
O
G
D
7
D
O
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
2564 cnv* 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
AUGUST 1995
DSC-4216/6
6.12
1
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