鈥?/div>
DESCRIPTION:
High frequency > 150MHz
Guaranteed low skew < 150ps (max.) between any two outputs
Very low duty cycle distortion < 300ps
High speed: propagation delay < 3ns
Very low CMOS power levels
TTL compatible inputs and outputs
1:10 fanout
Maximum output rise and fall time < 1.25ns (max.)
Low input capacitance: 3pF typical
2.5V supply voltage
Available in SSOP and QSOP packages
The FCT20807 is a 2.5V compatible, high speed, low noise, 1:10 fanout,
non-inverting clock buffer. The large fanout from a single input reduces loading
on the preceding driver and provides an efficient clock distribution network.
Providing output to output skew as low as 150ps, the FCT20807 is an ideal clock
distribution device for synchronous systems. Multiple power and grounds
reduce noise. Typical applications are clock and signal distribution.
FUNCTIONAL BLOCK DIAGRAM
O
1
PIN CONFIGURATION
IN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
10
O
9
GND
O
8
V
CC
O
7
GND
O
6
O
5
O
2
GND
O
1
O
3
V
CC
O
2
O
4
GND
O
3
O
5
IN
O
6
V
CC
O
4
GND
O
7
SSOP/ QSOP
TOP VIEW
O
8
O
9
O
10
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2003 Integrated Device Technology, Inc.
FEBRUARY 2003
DSC - 6171/12