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IDT74FCT163601PV Datasheet

  • IDT74FCT163601PV

  • 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTP...

  • 7頁(yè)

  • IDT

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廬
Integrated Device Technology, Inc.
3.3V CMOS
18-BIT UNIVERSAL BUS
TRANSCEIVER
WITH 3-STATE OUTPUTS
IDT74FCT163601/A
ADVANCE INFORMATION
FEATURES:
鈥?0.5 MICRON CMOS Technology
鈥?/div>
Typical t
SK
(o) (Output Skew) < 250ps
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP and 15.7 mil pitch TVSOP
鈥?Extended commercial range of -40擄C to +85擄C
鈥?V
CC
= 3.3V
鹵0.3V,
Normal Range or
V
CC
= 2.7 to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌W typ. static)
鈥?Rail-to-Rail output swing for increased noise margin
鈥?Low Ground Bounce (0.3V typ.)
鈥?Inputs (except I/O) can be driven by 3.3V or 5V
components
DESCRIPTION:
The FCT163601/A 18-bit registered transceiver is built
using advanced dual metal CMOS technology. These 18-bit
universal bus transceivers combine D-type latches and D-
type flip-flops to allow data flow in transparent, latched and
clocked modes.
Data flow in each direction is controlled by output-enable
(
OEAB
and
OEBA
), latch-enable (LEAB and LEBA), and clock
(CLKAB and CLKBA) inputs. The clock can be controlled by
the clock-enable (
CLKENAB
and
CLKENBA
) inputs. For A-to-
B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if
CLKAB is held at a high or low logic level. If LEAB is low, the
A-bus data is stored in the latch/flip-flop on the low-to-high
transition of CLKAB. Output enable
OEAB
is active low.
When
OEAB
is low, the outputs are active. When
OEAB
is
high, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA
,
LEBA, CLKBA and
CLKENBA
.
The FCT163601 has series current limiting resistors. These
offer low ground bounce, minimal undershoot, and controlled
output fall times-reducing the need for external series termi-
nating resistors.
FUNCTIONAL BLOCK DIAGRAM
OEAB
CLKENAB
CLKAB
LEAB
LEBA
CLKBA
CLKENBA
OEBA
1
56
55
2
28
30
29
27
A
1
3
CE
1D
C1
CLK
CE
1D
C1
CLK
54
B
1
TO 17 OTHER CHANNELS
3251 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
5.9
DSC-3251/1
1

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