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IDT728980 Datasheet

  • IDT728980

  • TIME SLOT INTERCHANGE DIGITAL SWITCH

  • IDT

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TIME SLOT INTERCHANGE
DIGITAL SWITCH
256 x 256
.EATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
IDT728980
256 x 256 channel non-blocking switch
Serial Telecom Bus Compatible (ST-BUS
廬
)
8 RX inputs鈥?2 channels at 64 Kbit/s per serial line
8 TX output鈥?2 channels at 64 Kbit/s per serial line
Three-state serial outputs
Microprocessor Interface (8-bit data bus)
5V Power Supply
Available in 44-pin Plastic Leaded Chip Carrier (PLCC), 40-pin
Plastic Dip (P-DIP) and 44-pin Plastic Quad Flatpack (PQFP)
擄
擄
Operating Temperature Range -40擄C to +85擄C
outputs, each of which consists of 32 channels (64 Kbit/s per channel) to form
a multiplexed 2.048 Mb/s stream.
.UNCTIONAL DESCRIPTION
A functional block diagram of the IDT728980 device is shown on below. The
serial ST-BUS
廬
streams operate continuously at 2.048 Mb/s and are arranged
in 125碌s wide frames each containing 32, 8-bit channels. Eight input (RX0-7)
and eight output (TX0-7) serial streams are provided in the IDT728980 device
allowing a complete 256 x 256 channel non-blocking switch matrix to be
constructed. The serial interface clock (C4i) for the device is 4.096 MHz.
The received serial data is internally converted to a parallel format by the on
chip serial-to-parallel converters and stored sequentially in a 256-position Data
Memory. By using an internal counter that is reset by the input 8 KHz frame pulse,
F0i,
the incoming serial data streams can be framed and sequentially addressed.
Data to be output on the serial streams may come from two sources: Data
Memory or Connection Memory. The Connection Memory is 16 bits wide and
DESCRIPTION:
The IDT728980 is a ST-BUS
廬
compatible digital switch controlled by a
microprocessor. The IDT728980 can handle as many as 256, 64 Kbit/s input
and output channels. Those 256 channels are divided into 8 serial inputs and
.UNCTIONAL BLOCK DIAGRAM
C4i
F0i
V
CC
GND
ODE
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX7
Timing
Unit
TX0
Output MUX
Transmit
Serial Data
Streams
TX1
TX2
Receive
Serial Data
Streams
Data
Memory
Control Register
Connection
Memory
TX3
TX4
TX5
TX6
TX7
Microprocessor Interface
5706 drw01
DS
CS
R/W A0/
DTA
D0/
A5
D7
CCO
JANUARY 2001
1
錚?/div>
2001 Integrated Device Technology, Inc.
DSC-5706/1

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