CMOS Static RAM
1 Meg (128K x 8-Bit)
Revolutionary Pinout
Features
128K x 8 advanced high-speed CMOS static RAM
JEDEC revolutionary pinout (center power/GND) for
reduced noise.
Equal access and cycle times
鈥?Commercial and Industrial: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional inputs and outputs directly TTL-compatible
Low power consumption via chip deselect
Available in a 32-pin 400 mil Plastic SOJ.
IDT71124
Description
The IDT71124 is a 1,048,576-bit high-speed static RAM orga-
nized as 128K x 8. It is fabricated using IDT鈥檚 high-performance,
high-reliability CMOS technology. This state-of-the-art technology,
combined with innovative circuit design techniques, provides a cost-
effective solution for high-speed memory needs. The JEDEC
centerpower/GND pinout reduces noise generation and improves
system performance.
The IDT71124 has an output enable pin which operates as fast
as 6ns, with address access times as fast as 12ns available. All
bidirectional inputs and outputs of the IDT71124 are TTL-compatible
and operation is from a single 5V supply. Fully static asynchronous
circuitry is used; no clocks or refreshes are required for operation.
The IDT71124 is packaged in a 32-pin 400 mil Plastic SOJ.
x
x
x
x
x
x
x
Functional Block Diagram
A
0
鈥?/div>
鈥?/div>
鈥?/div>
A
16
ADDRESS
DECODER
鈥?/div>
鈥?/div>
鈥?/div>
1,048,576-BIT
MEMORY ARRAY
I/O
0
- I/O
7
鈥?/div>
8
I/O CONTROL
8
8
,
WE
OE
CS
CONTROL
LOGIC
3514 drw 01
FEBRUARY
2001
1
漏2000 Integrated Device Technology, Inc.
DSC-3514/10
IDT71124 PDF文件相關型號
IDT71124S12YI
IDT71124相關型號PDF文件下載
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