鈥?/div>
9.0A, 200V, R
DS(on)
= 0.28鈩?@V
GS
= 10 V
Low gate charge ( typical 16 nC)
Low Crss ( typical 17 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Low level gate drive requirement allowing direct
opration from logic drivers
D
D
!
"
G
!
G
S
! "
"
"
D-PAK
FQD Series
I-PAK
G D S
FQU Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25擄C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25擄C)
Drain Current
- Continuous (T
C
= 100擄C)
Drain Current
- Pulsed
(Note 1)
FQD12N20L / FQU12N20L
200
9.0
5.7
36
鹵
20
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/擄C
擄C
擄C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25擄C) *
Power Dissipation (T
C
= 25擄C)
210
9.0
5.5
5.5
2.5
55
0.44
-55 to +150
300
T
J
, T
STG
T
L
- Derate above 25擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃JA
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
2.27
50
110
Units
擄C/W
擄C/W
擄C/W
* When mounted on the minimum pad size recommended (PCB Mount)
漏2001 Fairchild Semiconductor Corporation
Rev. A1, February 2001