鈥?/div>
DESCRIPTION AND APPLICATIONS
The FPD750P100 is a packaged AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor
(PHEMT), featuring a 0.25
碌m
by 750
碌m
Schottky barrier gate, defined by high-resolution stepper-
based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize
performance. The epitaxial structure and processing have been optimized for reliable high-power
applications. The FPD750P100 also features Si
3
N
4
passivation and is also available in die form and
in the low cost plastic SOT89, SOT343, and DFN plastic packages.
Typical applications include commercial and other narrowband and broadband high-performance
amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output
amplifiers, and medium-haul digital radio transmitters.
鈥?/div>
ELECTRICAL SPECIFICATIONS AT 22擄C
Parameter
Power at 1dB Gain Compression
Power Gain at P
1dB
Maximum Stable Gain (S
21
/S
12
)
Symbol
P
1dB
G
1dB
SSG
Test Conditions
V
DS
= 8 V; I
DS
= 50% I
DSS
V
DS
= 8 V; I
DS
= 50% I
DSS
V
DS
= 8 V; I
DS
= 50% I
DSS
f
= 2 GHz
f
= 10 GHz
Power-Added Efficiency
Output Third-Order Intercept Point
(from 15 to 5 dB below P
1dB
)
Saturated Drain-Source Current
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Gate-Drain Breakdown Voltage
Thermal Resistivity (see Notes)
I
DSS
I
MAX
G
M
I
GSO
|V
P
|
|V
BDGD
|
胃
JC
PAE
IP3
V
DS
= 8 V; I
DS
= 50% I
DSS
;
P
OUT
= P
1dB
V
DS
= 8V; I
DS
= 50% I
DSS
Matched for optimal power
V
DS
= 1.3 V; V
GS
= 0 V
V
DS
= 1.3 V; V
GS
鈮?/div>
+1 V
V
DS
= 1.3 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 1.3 V; I
DS
= 0.75 mA
I
GD
= 0.75 mA
V
DS
> 6V
0.7
14.5
185
36
230
375
200
1
1.0
16.0
48
15
1.3
280
dBm
mA
mA
mS
碌A(chǔ)
V
V
擄C/W
22.0
10.5
23.0
11.5
45
dB
dB
%
Min
25.0
18.0
Typ
26.5
18.5
Max
Units
dBm
dB
UNLESS OTHERWISE NOTED, RF SPECIFICATIONS MEASURED AT
f
= 2 GHz USING CW SIGNAL
Phone:
+1 408 850-5790
Fax:
+1 408 850-5766
http://www.filtronic.co.uk/semis
Released:
6/27/05
Email:
sales@filcsi.com
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