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FDC6323 Datasheet

  • FDC6323

  • Integrated Load Switch

  • 10頁

  • FAIRCHILD

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March 1999
FDC6323L
Integrated Load Switch
General Description
These Integrated Load Switches are produced using
Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is
especially tailored to minimize on-state resistance and
provide superior switching performance. These
devices are particularly suited for low voltage high
side load switch application where low conduction loss
and ease of driving are needed.
Features
V
DROP
=0.2V @ V
IN
=5V, I
L
=1A, V
ON/OFF
= 1.5V to 8V
V
DROP
=0.3V @ V
IN
=3.3V, I
L
=1A, V
ON/OFF
= 1.5V to 8V.
High density cell design for extremely low on-resistance.
V
ON/OFF
Zener protection for ESD ruggedness.
>6KV Human Body Model.
SuperSOT
TM
-6 package design using copper lead frame
for superior thermal and electrical capabilities.
SOT-23
SuperSOT
TM
-6
SuperSOT
TM
-8
SO-8
SOT-223
SOIC-16
V in,R1
4
Q2
3
Vout,C1
EQUIVALENT CIRCUIT
O N / O FF
5
Q1
2
Vout,C1
IN
+
V
DROP
-
OUT
pin
1
R1,C1
6
See Application Circuit
1
O N / O FF
R2
SuperSOT
TM
-6
Absolute Maximum Ratings
Symbol
Parameter
T
A
= 25擄C unless otherwise noted
FDC6323L
Units
V
IN
V
ON/OFF
I
L
Input Voltage Range
On/Off Voltage Range
Load Current @ V
DROP
=0.5V - Continuous
- Pulsed
(Note 1)
(Note 1 & 3)
(Note 2a)
3-8
1.5 - 8
1.5
2.5
0.7
-55 to 150
6
V
V
A
P
D
T
J
,T
STG
ESD
Maximum Power Dissipation
Operating and Storage Temperature Range
W
擄C
kV
Electrostatic Discharge Rating MIL-STD-883D Human Body
Model (100pf/1500Ohm)
THERMAL CHARACTERISTICS
R
胃JA
R
胃JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 2a)
(Note 2)
180
60
擄C/W
擄C/W
漏 1999 Fairchild Semiconductor Corporation
FDC6323L Rev.F

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