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DS_S1D2502A01 Datasheet

  • DS_S1D2502A01

  • VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

  • 57頁(yè)

  • SAMSUNG   SAMSUNG

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S1D2502A01
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
VIDEO AMP MERGED OSD PROCESSOR
The S1D2502A01 is a very high frequency video amplifier
& wide range OSD processor 1 chip system with I
2
C Bus
control used in monitors. It contains 3 matched R/G/B video
amplifiers with OSD processor and provides flexible
interfacing to I
2
C Bus controlled adjustment systems.
32-DIP-600A
FUNCTIONS
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R/G/B video amplifier
OSD processor
I
2
C bus control
Cut-off brightness control
R/G/B sub contrast/cut-off control
Half tone
ORDERING INFORMATION
Device
S1D2502A01-D0B0
Package
32-DIP-600A
Operating Temperature
-20
擄C
鈥?+75
擄C
FEATURES
VIDEO AMP PART
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3-channel R/G/B video amplifier, 175MHz @f-3dB
I C bus control items
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Contrast control: -38dB
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Sub contrast control for each channel: -12dB
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Brightness control
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OSD contrast control: -38dB
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Cut-off brightness control (AC coupling)
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Cut-off control for each channel (AC coupling)
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Switch registers for SBLK and video half tone and
CLP/BLK polarity selection and INT/EXT CLP selection
and generated CLP width control
Built in ABL (automatic beam limitation)
Built in video input clamp, BRT clamp
Built in video half tone (3mode) function on OSD
pictures
Capable of 8.0Vp-p output swing
Improvement of rise & fall time (2.2ns)
Cut-off brightness control
Built in blank gate with spot killer
Clamp pulse generator
OSD intensity
BLK, CLP polarity selection
Clamp gate with anti OSD sagging
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2
OSD PART
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Built in 1K-byte SRAM
448 ROM fonts (each font consists of 12
脳
18
dots.)
Full screen memory architecture
Wide range PLL available (15kHz
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96kHz,
Reference 800 X 600)
Programmable vertical height of character
Programmable vertical and horizontal
positioning
Character color selection up to 16 different
colors
Programmable background color (up to 16
colors)
Character blinking, bordering and shadowing
Color blinking
Character scrolling
Fade-in and fade-out
Box drawing
Character sizing up to four times
76.8MHz pixel frequency from on-chip PLL
(Reference 800 X 600)
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