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DM74LS564N Datasheet

  • DM74LS564N

  • Octal D-Type Flip-Flop with TRI-STATE Outputs

  • 122.03KB

  • NSC

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DM74LS564 Octal D-Type Flip-Flop with TRI-STATE Outputs
February 1992
DM74LS564
Octal D-Type Flip-Flop with TRI-STATE Outputs
General Description
The 鈥橪S564 is a high speed low power octal flip-flop with a
buffered common Clock (CP) and a buffered common Out-
put Enable (OE) The information presented to the D inputs
is stored in the flip-flops on the LOW-to-HIGH Clock (CP)
transition
This device is functionally identical to the 鈥橪S574 but has
inverted outputs For complete discussions of operations
truth tables AC and DC electrical specifications refer to the
鈥橪S374 data sheet
Features
Y
Y
Y
Y
Y
Inputs and outputs on opposite sides of package allow-
ing easy interface with microprocessors
Useful as input or output port for microprocessors
Functionally identical to 鈥橪S574
Input clamp diodes limit high speed termination effects
Fully TTL and CMOS compatible
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 10191 鈥?2
V
CC
e
Pin 20
GND
e
Pin 10
TL F 10191 鈥?1
Order Number DM74LS564WM or DM74LS564N
See NS Package Number M20B or N20A
Pin Names
D0鈥揇7
CP
OE
O0 鈥揙7
Description
Data Inputs
Clock Pulse Input (Active Rising Edge)
TRI-STATE Output Enable Input
(Active LOW)
TRI-STATE Outputs
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 10191
RRD-B30M105 Printed in U S A

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