D950-CORE
16-Bit Fixed Point Digital Signal Processor (DSP) Core
PRELIMINARY DATA
s
UNIT
YD-bus
XD-bus
s
ADDRESS
CALCULATION
UNIT
16
XA-bus
YA-bus
16
16
16
s
PROGRAM
CONTROL
UNIT
3
ID-bus
IA-bus
16
16
s
11
CONTROL
8
14
TEST & EMULATION
PO/P7
s
s
s
s
s
s
Peripherals and Memory
s
Macrocells for peripherals such as the bus
switch unit, interrupt controller and DMA
controller
s
Standard cells library, I/O library
s
Memory generators for RAM and ROM
Development Tools
s
JTAG PC board with graphic windowed high
level source debugger for AS-DSP emulation
s
Complete crash-barrier chain (assembler /
simulator / linker) running on PC and SUN,
s
Complete GNU chain (assembler / simulator /
linker / C compiler / C debugger) for SUN
s
VHDL model (SYNOPSYS & MENTOR)
4 September 1997
This is preliminary information on a new product in development or undergoing evaluation. Details are subject to change without notice
V
DD
V
SS
PROGRAM MEMORY
DATA MEMORY
6
OUTPUT
CLOCKS
s
Performance
s
66 Mips - 15ns instruction cycle time
Memory Organization
s
HARVARD architecture
s
Two 64k x 16-bit data memory spaces
s
One 64k x 16-bit program memory space
s
2 stacks in data memory spaces
Fast and Flexible Buses
s
Two
16-bit address 16-bit data non-
multiplexed data buses
s
One
16-bit address 16-bit data non-
multiplexed instruction bus
Data Calculation Unit
s
16 x 16-bit parallel multiplier
s
40-bit barrel shifter unit
s
40-bit ALU
s
Two 40-bit extended precision accumulators
s
Fractional and integer arithmetic with support
for floating point and multi-precision
s
16-bit bit manipulation unit (BMU)
Address Calculation Unit
s
Two address calculation units with modulo
and bit-reverse capability
s
2 x 16-bit address registers
s
4 x 16-bit index registers
s
2
x 16-bit base and maximum address
registers for modulo addressing
Program Control Unit
s
16-bit program counter
s
3 Hardware Loop Capabilities
Power Consumption
s
Single 3.3V power supply
s
Low-power standby mode
Electrical Characteristics
s
Operating frequency down to DC
Channels
s
General purpose 8-bit I/O port
s
Dedicated hardware for Emulation and Test,
IEEE 1149.1 (JTAG) interface compatible
DATA
CALCULATION
CLKIN
1/89