CY62126BV
64K x 16 Static RAM
Features
鈥?2.7V鈥?.6V operation
鈥?CMOS for optimum speed/power
鈥?Low active power (70 ns, LL version)
鈥?54 mW (max.) (15 mA)
鈥?Low standby power (70 ns, LL version)
鈥?54
碌W
(max.) (15
碌A)
鈥?Automatic power-down when deselected
鈥?Independent control of Upper and Lower Bytes
鈥?Available in 44-pin TSOP II (forward) and fBGA
(BLE) is LOW, then data from I/O pins (I/O
1
through I/O
8
), is
written into the location specified on the address pins (A
0
through A
15
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
9
through I/O
16
) is written into the location
specified on the address pins (A
0
through A
15
).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the write
enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O
1
to I/O
8
. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O
9
to I/O
16
. See the
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O
1
through I/O
16
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY62126BV is available in standard 44-pin TSOP Type II
(forward pinout) and fBGA packages.
Functional Description
The CY62126BV is a high-performance CMOS static RAM or-
ganized as 65,536 words by 16 bits. This device has an auto-
matic power-down feature that significantly reduces power
consumption by 99% when deselected. The device enters
power-down mode when CE is HIGH.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Logic Block Diagram
Pin Configurations
TSOP II (Forward)
Top View
A
4
A
3
A
2
A
1
A
0
CE
I/O
1
I/O
2
I/O
3
I/O
4
V
CC
V
SS
I/O
5
I/O
6
I/O
7
I/O
8
WE
A
15
A
14
A
13
A
12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
DATA IN DRIVERS
A
12
A
11
A
10
A
9
A
7
A
6
A
3
A
2
A
1
A
0
64K x 16
RAM Array
1024 X 1024
I/O
1
鈥?I/O
8
I/O
9
鈥?I/O
16
COLUMN DECODER
BHE
WE
CE
OE
BLE
62126BV鈥?
A
5
A
6
A
7
OE
BHE
BLE
I/O
16
I/O
15
I/O
14
I/O
13
V
SS
V
CC
I/O
12
I/O
11
I/O
10
I/O
9
NC
A
8
A
9
A
10
A
11
NC
ROW DECODER
A
4
A
5
A
8
A
13
A
14
A
15
SENSE AMPS
62126BV鈥?
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134
鈥?/div>
408-943-2600
June 14, 2000
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