ACT鈥揊2M32A High Speed 64 Megabit
Sector Erase
FLASH Multichip Module
Features
CIRCUIT TECHNOLOGY
www.aeroflex.com/act1.htm
s
Ready/Busy output (RY/BY) 鈥?Hardware method for
s
4 Low Voltage/Power AMD 2M x 8 FLASH Die in One
MCM Package
s
Overall Configuration is 2M x 32
s
+5V Power Supply / +5V Programing Operation
s
Access Times of 90, 120 and 150 ns
s
Erase/Program Cycles 鈥?100,000 Minimum
s
Sector erase architecture (Each Die)
q
32 uniform sectors of 64 Kbytes each
q
Any combination of sectors can be erased. Also
supports full chip erase
q
Sector group protection is user definable
s
Embedded Erase Algorithims 鈥?Automatically
pre-programs and erases the die or any sector
s
Embedded Program Algorithims 鈥?Automatically
programs and verifies data at specified address
detection of program or erase cycle completion
s
Hardware RESET pin 鈥?Resets internal state machine
to the read mode
s
Erase Suspend/Resume 鈥?Supports reading or
programming data to a sector not being erased
s
Packaging 鈥?Hermetic Ceramic
q
68 Lead, .94" x .94" x .140" Single-Cavity Small
Outline Gull Wing, Aeroflex code# "F18"
(Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
s
Internal Decoupling Capacitors for Low Noise
Operation
s
Commercial, Industrial and Military Temperature
Ranges
s
MIL-PRF-38534 Compliant MCMs Available
Pin Description
Block Diagram 鈥?CQFP(F18)
Standard Configuration
CE
1
RESET
WE
OE
A
0
鈥?/div>
A
20
RY/BY
2Mx8
8
I/O
0-7
2Mx8
8
I/O
8-15
2Mx8
8
I/O
16-23
2Mx8
8
I/O
24-31
CE
2
CE
3
General Description
Utilizing AMD鈥檚 Sector Erase
Flash
Memory
Die,
the
ACT-F2M32A is a high speed,
64
megabit
CMOS
flash
multichip
module
(MCM)
designed for full temperature
range, military, space, or high
reliability applications.
The ACT-F2M32A consists of
four high-performance AMD
Am29F016 16Mbit (16,777,216
bit) memory die. Each die
contains 8 separately write or
erase
sector
groups
of
256Kbytes (A sector group
consists of 4 adjacent sectors of
64Kbytes each).
The command register is
written by bringing WE to a logic
low level (V
IL
), while CE is low
and OE is high (V
IH
)
. Reading is
accomplished by chip Enable
(CE) and Output Enable (OE)
being logically active. Access
time grades of 90ns, 120ns and
150ns maximum are standard.
I/O
0-31
CE
4
A
0鈥?0
WE
CE
1-4
OE
RY/BY
RESET
V
CC
GND
NC
Data I/O
Address Inputs
Write Enables
Chip Enables
Output Enable
Ready/Busy
Reset
Power Supply
Ground
Not Connected
Block Diagram 鈥?CQFP(F18)
Optional Configuration
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
RESET
OE
A
0
鈥?/div>
A
20
Pin Description
I/O
0-31
A
0鈥?0
WE
1-4
CE
1-4
OE
2Mx8
2Mx8
2Mx8
2Mx8
RESET
V
CC
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enable
Chip Enables
Output Enable
Reset
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules 漏 SCD1666A REV A 9/12/97
1
2
3
4
5
6
7
8
9
