ACT鈥揊1M32 High Speed 32 Megabit
Boot Block
FLASH Multichip Module
Features
www.aeroflex.com/act1.htm
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CIRCUIT TECHNOLOGY
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4 Low Voltage/Power Intel 1M x 8 FLASH Die in One
MCM Package
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Overall Configuration is 1M x 32
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+5V Operation (Standard) or +3.3V (Consult Factory)
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Access Times of 80, 100 and 120 nS ( 5V V
CC
)
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+5V or +12V Programing
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Erase/Program Cycles
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100,000 Commercial
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10,000 Military and Industrial
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Sector Architecture (Each Die)
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One 16K Protected Boot Block (Bottom
Boot Block
Standard, Top Boot Block Special Order)
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Two 8K Parameter Blocks
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One 96K Main Block
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Seven 128K Main Blocks
Single Block Erase (All bits set to 1)
Hardware Data Protection Feature
Independent Boot Block Locking
MIL-PRF-38534 Compliant MCMs Available
Packaging 鈥?Hermetic Ceramic
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68 Lead, .94" x .94" x .180" Dual-Cavity Small
Outline Gull Wing, Aeroflex code# "F14"
(Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
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Internal Decoupling Capacitors for Low Noise
Operation
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Commercial, Industrial and Military Temperature
Ranges
Block Diagram 鈥?CQFP(F14)
Standard Configuration
CE
1
WP
WE
OE
A
0
鈥?/div>
A
19
RP
1Mx8
1Mx8
1Mx8
1Mx8
CE
2
CE
3
Pin Description
I/O
0-31
CE
4
A
0鈥?9
WE
CE
1-4
OE
WP
RP
V
CC
Data I/O
Address Inputs
Write Enables
Chip Enables
Output Enable
Write Protect
Reset/Powerdown
Power Supply
Ground
Not Connected
General Description
Utilizing Intel鈥檚 SmartVoltage
Boot Block Flash Memory
SmartDie鈩? the ACT鈥揊1M32 is
a high speed, 32 megabit CMOS
flash multichip module (MCM)
designed for full temperature
range military, space, or high
reliability applications.
The ACT-F1M32 consists of
four high-performance Intel
X28F800BV 8 Mbit (8,388,608
bit) memory die. Each die
contains separately erasable
blocks, including a hardware
lockable boot block (16,384
bytes), two parameter blocks
(8,192 bytes each), and 8 main
blocks (one block of 98,304
bytes and seven blocks of
131,072 bytes) This defines the
boot
block
flash
family
architecture.
The command register is
written by bringing WE to a logic
low level (V
IL
), while CE is low
and OE is high (V
IH
)
. Reading is
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Block Diagram 鈥?CQFP(F14)
Optional Configuration
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
RP
OE
A
0
鈥?/div>
A
19
Pin Description
I/O
0-31
A
0鈥?9
WE
1-4
CE
1-4
OE
1Mx8
1Mx8
1Mx8
1Mx8
RP
V
CC
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enable
Chip Enables
Output Enable
Reset/Powerdown
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules 漏 SCD1661B REV A 1/16/97
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