一種Cortex-M3 CPU USB接口方案
出處:王蓉,徐瓊燕(九江職業(yè)技術學院 江西九江 332007) 發(fā)布于:2011-09-02 08:28:11
簡述
微控制器是將微型計算機的主要部分集成在一個芯片上的單芯片微型計算機。微控制器誕生于20世紀70年代中期,經過20多年的發(fā)展,其成本越來越低,而性能越來越強大,這使其應用已經無處不在,遍及各個領域。例如電機控制、條碼閱讀器/掃描器、消費類電子、游戲設備、電話、HVAC、樓宇安全與門禁控制、工業(yè)控制與自動化和白色家電(洗衣機、微波爐)等。微控制器(Microcontroller Unit,即MCU)可從不同方面進行分類:根據數據總線寬度可分為8位、16位和32位機;根據存儲器結構可分為Harvard結構和Von Neumann結構;根據內嵌程序存儲器的類別可分為OTP、掩膜、EPROM/EEPROM和閃存Flash;根據指令結構又可分為CISC(Complex Instruction Set Computer)和RISC(Reduced Instruction Set Computer)微控制器。
NXP LPC1311/13/42/43 是基于Cortex-M3 的,具有高度集成和低功耗,可用于嵌入式應用。CPU工作頻率高達72MHz,單電源2.0V-3.6V工作,內置了嵌套中斷向量控制器(NVIC),多達32KB閃存,多達8KB數據存儲器,USB設備,快速模式I2C總線接口,一個UART,四個通用定時器和多達42個GPIO引腳。中央處理器是一臺計算機的運算和控制。CPU、內部存儲器和輸入/輸出設備是電子計算機三大部件。電腦中所有操作都由CPU負責讀取指令,對指令譯碼并執(zhí)行指令的部件。其功能主要是解釋計算機指令以及處理計算機軟件中的數據。所謂的計算機的可編程性主要是指對CPU的編程。 CPU由運算器、控制器和寄存器及實現它們之間聯(lián)系的數據、控制及狀態(tài)的總線構成。差不多所有的CPU的運作原理可分為四個階段:提?。‵etch)、解碼(Decode)、執(zhí)行(Execute)和寫回(Writeback)。本文介紹了LPC1311/13/42/43主要特性,方框圖,時鐘發(fā)生方框圖以及自供電USB接口框圖和總線供電USB接口框圖。
The LPC1311/13/42/43 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
The LPC1311/13/42/43 operate at CPU frequencies of up to 72 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.
The peripheral complement of the LPC1311/13/42/43 includes up to 32 kB of flash memory, up to 8 kB of data memory, USB Device (LPC1342/43 only), one Fast-mode Plus I2C-bus interface, one UART, four general purpose timers, and up to 42 general purpose I/O pins.
LPC1311/13/42/43主要特性和優(yōu)勢:
ARM Cortex-M3 processor, running at frequencies of up to 72 MHz.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC)。
32 kB (LPC1343/13)/16 kB (LPC1342)/8 kB (LPC1311) on-chip flash programming memory.
8 kB (LPC1343/13)/4 kB (LPC1342/11) SRAM.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
Selectable boot-up: UART or USB (USB on LPC134x only)。
On LPC134x: USB MSC and HID on-chip drivers.
Serial interfaces:
USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43 only)。
UART with fractional baud rate generation, modem, internal FIFO, and RS-485/EIA-485 support.
SSP controller with FIFO and multi-protocol capabilities.
I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.
Other peripherals:
Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.
Four general purpose counter/timers with a total of four capture inputs and 13 match outputs.
Programmable WatchDog Timer (WDT)。
System tick timer.
Serial Wire Debug and Serial Wire Trace port.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Single power supply (2.0 V to 3.6 V)。
10-bit ADC with input multiplexing among 8 pins.
GPIO pins can be used as edge and level sensitive interrupt sources.
Clock output function with pider that can reflect the system oscillator clock, IRC clock, CPU clock, or the watchdog clock.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 40 of the functional pins.
Brownout detect with four separate thresholds for interrupt and one threshold for forced reset.
Power-On Reset (POR)。
Integrated oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 1 % accuracy over the entire temperature and voltage range that can optionally be used as a system clock.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
System PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
For USB (LPC1342/43), a second, dedicated PLL is provided.
Code Read Protection (CRP) with different security levels.
Unique device serial number for identification.
Available as 48-pin LQFP package and 33-pin HVQFN package.
LPC1311/13/42/43應用:
eMetering
Lighting
Alarm systems
White goods

圖1 LPC1311/13/42/43方框圖

圖2 LPC1311/13/42/43時鐘發(fā)生方框圖

圖3 LPC1311/13/42/43自供電USB接口框圖

圖3 LPC1342/43總線供電USB接口框圖
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