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這是POWERPC下的一段連接文件(DIAB編譯器)

作者:xillinx 欄目:嵌入式系統(tǒng)
這是POWERPC下的一段連接文件(DIAB編譯器)
/*
********************************************************************************
    DLD File
    Created By xillinx 2004-07-29
********************************************************************************
*/

/*
--------------------------------------------------------------------------------
The MEMORY command NAMEs one or more areas of MEMORY, e.g., “rom”, “ram”.
Each area is defined by a start address and a length in bytes. A later
section-definition command can then direct that an OUTPUT section be located
in a NAMEd area. The LINKer will warn if the total length of the sections
assigned to any area exceeds the area’s length.
--------------------------------------------------------------------------------
*/
MEMORY
{   
    vect:      org = 0x00000000, len =  0x3000
    rom:       org = 0x00003000, len =  0x1F0000
    rta:       org = 0x00200000, len =  0x7F000
    melitbuf:  org = 0x00280000, len =  0x40000
    netbuf:    org = 0x002C0000, len =  0x13f000
    ram:       org = 0x00400000, len =  0xc00000
}

/*
--------------------------------------------------------------------------------
The SECTIONS command does most of the work in a LINKer command file. Each input
object file consists of input sections. The primary task of the LINKer is to
collect input sections and LINK them into OUTPUT sections. The SECTIONS command
defines each OUTPUT section and the input sections to be made PART of it.
Within the SECTIONS command, a GROUP statement may be used to collect several
OUTPUT sections together.
--------------------------------------------------------------------------------
*/

/*
--------------------------------------------------------------------------------
A SECTIONS command may contain group-definitions as well as section-definitions
At a MINIMUM, each section-definition defines a new OUTPUT section and specifies
the input sections that are to be put into that OUTPUT section. Optional clauses
may:
--------------------------------------------------------------------------------
*/

/*
********************************************************************************
section-definition:
1.  specify an address for the OUTPUT section or place the OUTPUT section in a
    MEMORY area defined by an earlier MEMORY command
2.  align the section
3.  fill any holes in the section with a fixed VALUE
4.  define symbols to be used later in the LINKer command file or in the code
    being LINKed.
format:
    OUTPUT-section-NAME
        [ ( [=]BSS | [=]DATA | [=]TEXT ) ]                   //* type-spec
        [ address-VALUE | BIND ( expression ) ]              //* address-spec
        [ ALIGN ( expression ) ]                             //* align-spec
        [ LOAD ( expression ) ]                              //* load-spec
        [ OVERFLOW ( size-expression, overflow-section-NAME) //* overflow-spec
        ][ REGISTER( register-number ][,offset]) ]             //* SDA-register-spec
        :
        { section-contents }
        [ =fill-VALUE ]                                      //* fill-spec
        [ > area-NAME ]                                      //* area-spec
********************************************************************************
*/
SECTIONS
{
    /*
    ----------------------------------------------------------------------------
    The Nucleus vector table is placed at address 0x00000000
    That is, { } with no explicitly NAMEd section-contents: include in the OUTPUT
    section all sections from all input object files which have the same NAME
    as the OUTPUT-section-NAME. Example:    .data : {}
    
    The <empty> form is processed ONLY after the LINKer has examined and
    processed all other input specifications. Thus, input sections loaded
    directly or indirectly as a result of other more explicit specifications
    will not be re-loaded by an <empty> form, even if they appear
    after it.
    
    fileNAME Include all sections from the NAMEd object file which have the same
    NAME as the OUTPUT-section-NAME. Example: .data : { test1.o, test2.o }
    
    ----------------------------------------------------------------------------
    */
    .vectors : {} > vect

    /*
    ----------------------------------------------------------------------------
    MEMORY for rom buffer
    ----------------------------------------------------------------------------
    */
    GROUP : { .text   : { *(.text) *(.init) *(.fini) *(.eini) }
              .sdata2 : { }
            } > rom

    /*
    ----------------------------------------------------------------------------
    MEMORY for SDRAM buffer
    ----------------------------------------------------------------------------
    */
    GROUP : { .data  LOAD(ADDR(.sdata2) + SIZEOF(.sdata2)) : {}
              .sdata LOAD(ADDR(.sdata2) + SIZEOF(.sdata2) + SIZEOF(.data )) : {}
              .sbss 
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