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ZL50030 Datasheet

  • ZL50030

  • Flexible 4 K x 2 K Channel Digital Switch with H.110 Interfa...

  • 73頁

  • ZARLINK   ZARLINK

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ZL50030
Flexible 4 K x 2 K Channel Digital Switch with
H.110 Interface and 1 K x 1 K Local Switch
Data Sheet
Features
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4,096 x 2,048 blocking switching between
backplane and local streams
1,024 x 1,024 non-blocking switching between
local streams
2,048 x 2,048 non-blocking switching between
backplane streams
Rate conversion between backplane and local
streams
Backplane interface accepts data rates of
8.192 Mbps or 16.384 Mbps
Local interface accepts data rates of 2.048 Mbps,
4.096 Mbps or 8.192 Mbps on a per group basis
Meets all the key H.110 mandatory signal
requirements including timing
Per-channel variable or constant throughput
delay
Per-stream input delay, programmable for local
streams on a per bit basis
Per-stream output advancement, programmable
for backplane and local streams
Per-channel direction control for backplane
streams and local streams
Per-channel message mode for backplane and
local streams
Per-channel high impedance output control for
backplane and local streams
Compatible to Stratum 4 Enhanced clock
switching standard
Integrated PLL conforms to Telcordia GR-1244-
CORE Stratum 4 Enhanced switching standard
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Holdover Mode with holdover frequency stability
of 0.07 ppm
Jitter attenuation from 1.52 Hz.
Time interval error (TIE) correction
Master and Slave mode operation
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Ordering Information
ZL50030GAC
220 Ball - PBGA
February 2005
-40擄C to +85擄C
Pseudo-Random Binary Sequence (PRBS) pattern
generation and testing for backplane and local
streams
Conforms to the mandatory requirements of the
IEEE-1149.1 (JTAG) standard
3.3 V operation with 5 V tolerant inputs and I/O鈥檚
5 V tolerant PCI driver on CT-Bus I/O鈥檚
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Applications
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Carrier-grade VoIP Gateways
IP-PBX and PABX
Intregrated Access Devices
Access Servers
CTI Applications/CompactPCI
廬
Platforms
H.110, H.100, ST-BUS and proprietary Backplane
Applications
Description
The ZL50030 Digital Switch provides switching
capacities of 4,096 x 2,048 channels between
backplane and local streams, 1,024 x 1,024 channels
among local streams, and 2,048 x 2,048 channels
among backplane streams. The local connected serial
inputs and outputs have 32, 64 and 128 64 kbps
channels per frame with data rates of 2.048, 4.096 and
8.192 Mbps respectively. The backplane connected
serial inputs and outputs have 128 and 256 64 kbps
channels per frame with data rates of 8.192 and
16.384 Mbps respectively.
The device has features that are programmable on a
per-stream or a per-channel basis including message
mode, input delay offset, output advancement offset,
and direction control.
Non-multiplexed microprocessor interface
Connection memory block-programming for fast
device initialization
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.

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