鈥?/div>
Independent multiple channels of echo
cancellation; from 32 channels of 64 ms to 16
channels of 128 ms with the ability to mix
channels at 128 ms or 64 ms in any combination
Fully compliant to ITU-T G.165, G.168 (2000) and
(2002) specifications
Passed all AT&T voice quality tests for carrier
grade echo canceller systems.
Unparalleled in-system tunability
Sub 50 ms initial convergence times under many
typical network conditions
Fast reconvergence on echo path changes
Patented Advanced Non-Linear Processor with
high quality subjective performance
Superior noise matching algorithm
PCM coding,
碌/A-Law
ITU-T G.711 or sign
magnitude
Per channel Fax/Modem G.164 2100 Hz or G.165
2100 Hz phase reversal Tone Disable
Per channel echo canceller parameters control
Transparent data transfer and mute
Protection against narrow band signal divergence
and instability in high echo environments
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Ordering Information
ZL38065QCG 100 Pin LQFP Trays, Bake & Drypack
ZL38065GDG 208 Ball LBGA Trays, Bake & Drypack
ZL38065QCG1 100 Pin LQFP* Trays, Bake & Drypack
*Pb Free Matte Tin
-40擄C to +85擄C
July 2005
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
+9 dB to -12 dB level adjusters (3 dB steps) at all
signal ports
Offset nulling of all PCM channels
Independent Power Down mode for each group of
2 channels for power management
Compatible to ST-BUS and GCI interface at
2 Mbps serial PCM
3.3 V pads and 1.8 V Logic core operation with
5 V tolerant inputs
IEEE-1149.1 (JTAG) Test Access Port
Applications
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Voice over IP network gateways
Voice over ATM, Frame Relay
T1/E1/J1 multichannel echo cancellation
Wireless base stations
Echo Canceller pools
V
DD2 (1.8 V)
ODE
V
DD1 (3.3V)
V
SS
Echo Canceller Pool
Rin
Sin
MCLK
Fsel
PLL
Serial
to
Parallel
Group 0
ECA/ECB
Group 1
ECA/ECB
Group 2
ECA/ECB
Group 3
ECA/ECB
Parallel
to
Serial
Rout
Sout
Group 4
ECA/ECB
Group 5
ECA/ECB
Group 6
ECA/ECB
Group 7
ECA/ECB
Group 8
ECA/ECB
Group 9
ECA/ECB
Group 10
ECA/ECB
Group 11
ECA/ECB
Group 12
ECA/ECB
C4i
F0i
Timing
Unit
Group 13
ECA/ECB
Group 14
ECA/ECB
Group 15
ECA/ECB
Note:
Refer to Figure 4
for Echo Canceller
block diagram
IC0
RESET
Microprocessor Interface
Test Port
DS CS R/W A12-A0 DTA
D7-D0
IRQ TMS TDI TDO TCK TRST
Figure 1 - ZL38065 Device Overview
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.
next
ZL38065GDG相關(guān)型號PDF文件下載
-
型號
版本
描述
廠商
下載
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
ZARLINK [Z...
-
英文版
Low-Voltage Acoustic Echo Canceller With Noise Reduction
-
英文版
Low-Voltage Acoustic Echo Canceller With Noise Reduction
ZARLINK [Z...
-
英文版
AEC with Noise Reduction & Codecs for Digital Hands-Free Com...
ZARLINK [Z...
-
英文版
Dedicated Voice Processor with Dual Channel Codec
ZARLINK [Z...
-
英文版
Enhanced Voice Processor with Dual Wideband Codecs
ZARLINK [Z...
-
英文版
Low Power Quad ADPCM Transcoder
ZARLINK [Z...
-
英文版
Voice Processor
ZARLINK [Z...
-
英文版
32 Channel Voice Echo Canceller
-
英文版
32 Channel Voice Echo Canceller
ZARLINK [Z...
-
英文版
256 Channel Voice Echo Canceller
ZARLINK [Z...
-
英文版
32 Channel Voice Echo Canceller
ZARLINK [Z...
-
英文版
AEC for Analog Hands-Free Communication
ZARLINK [Z...
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
ZARLINK [Z...
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
-
英文版
Low-Voltage Acoustic Echo Canceller with Low ERL Compensatio...
ZARLINK [Z...
-
英文版
Digital Echo Canceller for Hands Free Communication
ZARLINK [Z...
-
英文版
Low-Voltage Acoustic Echo Canceller With Noise Reduction