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Supports output wander and jitter generation

specifications for GR-253-CORE OC-3 and G.813

STM-1 SONET/SDH interfaces

Accepts two input references and synchronizes to

any combination of 2 kHz, 8 kHz, 1.544 MHz,

2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz

inputs

Provides a 19.44 MHz (SONET/SDH) clock output

Provides an 8 kHz framing pulse and a 2 kHz

multi-frame pulse

Provides automatic entry into Holdover and return

from Holdover

Hitless reference switching

Provides lock and accurate reference fail

indication

Loop filter bandwidth of 29 Hz or 14 Hz

Less than 24 ps

rms

intrinsic jitter on the 19.44 MHz

output clock, compliant with GR-253-CORE OC-3

and G.813 STM-1 specifications

Less than 0.5 ns

pp

intrinsic jitter on output frame

pulses

External master clock source: clock oscillator or

crystal

Simple hardware control interface

Ordering Information

ZL30108LDA

32 pin QFN

October 2004

鈥?/div>

-40擄C to +85擄C

Applications

鈥?/div>

Line card synchronization for SONET/SDH

systems

鈥?/div>

Description

The ZL30108 SONET/SDH network interface digital

phase-locked loop (DPLL) provides timing and

synchronization for SONET/SDH network interface

cards.

The ZL30108 generates a SONET/SDH clock and

framing signals that are phase locked to one of two

backplane or network references. It helps ensure

system reliability by monitoring its references for

frequency accuracy and stability and by maintaining

tight phase alignment between the input reference

clock and clock outputs.

The ZL30108 output clock鈥檚 wander and jitter

generation are compliant with GR-253-CORE OC-3

and G.813 STM-1 specifications.

鈥?/div>

OSCi

OSCo

TIE_CLR

LOCK

Master Clock

REF0

REF1

MUX

TIE

Corrector

Circuit

Virtual

Reference

DPLL

Frequency

Synthesizer

C19o

F8ko

F2ko

REF_FAIL0

REF_FAIL1

OOR_SEL

REF_SEL

RST

MODE_SEL

Reference

Monitor

TIE

Corrector

Enable

Mode

Control

State Machine

Frequency

Select

Figure 1 - Functional Block Diagram

1

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

型號(hào)

版本

描述

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ZL30108LDA Datasheet

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