Z9305DZ Datasheet

IC型號：
Z9305DZ
PDF描述：
FIVE DISTRIBUTED-OUTPUT CLOCK DRIVER|SOP|8PIN|PLASTIC
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129.90KB
PDF頁數(shù)：
7頁
芯片廠家：
ETC

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Z9305/Z9309

3.3V 150 MHz Multi-Output Zero Delay Buffer

Features

鈥?/div>

Zero input-output propagation delay

Output-output skew less than 250 ps

Device-device skew less than 700 ps

One input drives nine outputs, grouped as 4/4/1 (Z9309)

10 MHz to 150 MHz operating range, compatible with

CPU and PCI bus frequencies

鈥?Less than 200 ps cycle-cycle jitter, compatible with

Pentium

廬

and Pentium Pro

廬

鈥揵ased systems

鈥?Spread Spectrum Compatible

鈥?Test Mode to bypass PLL (Z9309)

鈥?Available in space-saving 16-pin 150-mil SOIC and

TSSOP package (Z9309), and 8-pin 150-Mil SOIC

package (Z9305)

Block Diagram (Z9305)

REF

PLL

CLKOUT

CLK1

CLK2

CLK3

Block Diagram (Z9309)

PLL

CLK4

REF

CLKOUT

CLKA1

CLKA2

CLKA3

Select Input

Decoding

CLKA4

CLKB1

CLKB2

CLKB3

CLKB4

Cypress Semiconductor Corporation

Document #: 38-07196 Rev. **

鈥?/div>

3901 North First Street

鈥?/div>

San Jose

鈥?/div>

CA 95134 鈥?408-943-2600

Revised December 5, 2001

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Z9305DZ

英文版

FIVE DISTRIBUTED-OUTPUT CLOCK DRIVER|SOP|8PIN|PLASTIC

ETC

Z9305DZ

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