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is a member of Zilog's Z8
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single-chip microcontroller
family with enhanced wake-up circuitry, programmable
Watch-Dog Timers (WDT), and low-noise/EMI options.
These enhancements result in a more efficient, cost-
effective design and provide the user with increased
design flexibility over the standard Z8 microcontroller
core. This low-power consumption CMOS microcontroller
offers fast execution, efficient use of memory, sophisti-
cated interrupts, input/output bit manipulation capabili-
ties, and easy hardware/software system expansion.
The Z86L33/L43 features an Expanded Register File (ERF)
to allow access to register-mapped peripheral and I/O
circuits. Four basic address spaces are available to sup-
port this wide range of configurations: Program Memory,
Register File, External Data Memory (L43), and ERF. The
Register File is composed of 236 bytes of general-purpose
registers, four I/O port registers, and 15 control and status
registers. The ERF consists of three control registers
(Banks 0,D, and F)
For applications demanding powerful I/O capabilities, the
Z86L33 provides 24 pins, and the Z86L43 provides 32 pins
dedicated to input and output. These lines are configurable
CP96LVO1501 (6/96)
under software control to provide timing,
status signals, parallel I/O with or without handshake, and
address/data bus for interfacing external memory.
To unburden the system from coping with real-time tasks
such as counting/timing and data communication, the
Z86L33/L43 offers two on-chip counter/timers with a large
number of user-selectable modes.
With ROM/ROMless selectivity, the Z86L43 provides both
external memory and pre-programmed ROM, which
enables this Z8 microcontroller to be used in high-volume
applications, or where code flexibility is required.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
1