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Z86C35 Datasheet

  • Z86C35

  • CMOS Z8 MCUs WITH ASCI UART OFFER EFFICIENT, COST-EFFECTIVE ...

  • 1036.18KB

  • 70頁

  • ZILOG   ZILOG

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P
RELIMINARY
P
RODUCT
S
PECIFICATION
Z86C34/C35/C36
Z86C44/C45/C46
CMOS Z8
廬
MCU
S WITH
ASCI UART
O
FFER
E
FFICIENT
, C
OST
-E
FFECTIVE
D
ESIGN
F
LEXIBILITY
FEATURES
Device
Z86C34
Z86C35
Z86C36
Z86C44
Z86C45
Z86C46
ROM
(KB)
16
32
64
16
32
64
RAM*
(Bytes)
237
237
237
236
236
236
Speed
(MHz)
16
16
16
16
16
16
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Expanded Register File (ERF)
Full-Duplex UART (ASCI)
Dedicated 16-Bit Baud Rate Generator
32 Input/Output Lines (C44/C45/C46)
24 Input/Output Lines (C34/C35/C36)
Vectored, Prioritized Interrupts with Programmable Po-
larity
Two Analog Comparators
Two Programmable 8-Bit Counter/Timers, Each with
Two 6-Bit Programmable Prescaler
Watch-Dog Timer (WDT)/Power-On Reset (POR)
On-Chip Oscillator that Accepts a Crystal, Ceramic Res-
onator, LC, RC, or External Clock
RAM and ROM Protect
Optional 32-kHz Oscillator
Note:
*General-Purpose.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
28-Pin DIP, 28-Pin SOIC and PLCC Packages (C34,
C35, C36)
40-Pin DIP, 44-Pin PLCC and QFP Packages (C44,
C45, C46)
3.0- to 5.5-Volt Operating Range
Clock Free Watch-Dog Timer (WDT) Reset
Operating Temperature Ranges:
Standard: 0
擄
C to 70
擄
C
Extended: 鈥?0
擄
C to +105
擄
C
GENERAL DESCRIPTION
ZiLOG鈥檚 Z8
廬
MCU single-chip family now includes the
Z86C34/C35/C36/C44/C45/C46 product line, featuring en-
hanced wake-up circuitry, programmable Watch-Dog Tim-
ers (
WDT
), and low-noise/EMI options. Each of the new en-
hancements to the Z8 offer a more efficient, cost-effective
design and provide the user with increased design flexibility
over the standard Z8 microcontroller core. The low-power
consumption CMOS microcontroller offers fast execution,
efficient use of memory, sophisticated interrupts, input/out-
put bit manipulation capabilities, and easy hardware/soft-
ware system expansion.
The Z8 subfamily features an Expanded Register File (
ERF
)
to allow access to register-mapped peripheral and I/O cir-
cuits. Four basic address spaces are available to support this
wide range of configurations: Program Memory, Register
File, Data Memory, and
ERF
. The Register File is composed
of 236/237 bytes of general-purpose registers, four I/O port
registers, and 15 control and status registers. The
ERF
con-
sists of twelve control registers.
For applications demanding powerful I/O capabilities, the
Z86C34/C35/C36 offers 24 pins, and the Z86C44/C45/C46
offers 32 pins dedicated to input and output. These lines are
1
DS007601-Z8X0499

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