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XR-16C552CJ Datasheet

  • XR-16C552CJ

  • UART

  • 733.80KB

  • 54頁

  • ETC

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謾莽
APRIL 2002
XR16C850
3.3V AND 5V UART WITH 128-BYTE FIFO
REV. 2.0.0
GENERAL DESCRIPTION
The XR16C850
1
(850) is a Universal Asynchronous
Receiver and Transmitter (UART). This device sup-
ports Intel and PC mode data bus interface and is
software compatible to industry standard 16C450,
16C550, ST16C580 and ST16C650A UARTs.
The 850 has 128 bytes of TX and RX FIFOs and is
capable of operating up to a serial data rate of 2
Mbps (or up to 4 Mbps on the 52 pin package). The
internal registers include the 16C550 register set plus
Exar鈥檚 enhanced registers for additional features to
support today鈥檚 highly demanding data communica-
tion needs. The enhanced features include automatic
hardware and software flow control, selectable TX
and RX trigger levels, and wireless infrared (IrDA) en-
coder/decoder.
The XR16C850 is available in 40 pin PDIP, 44 pin
PLCC, 48 TQFP, and 52 pin QFP packages. The 40
pin package does not offer the PC mode. The 44, 48,
and 52 pin versions provide both the standard Intel
Bus mode or PC ISA bus (PC) mode. The Intel Bus
mode is compatible with the ST16C450 and
ST16C550 while the PC mode allows connection to
the PC ISA bus.
N
OTE
1: Covered by U.S. patent #5,649,122.
N
OTE
2: Windows is a trademark of Microsoft Corporation.
FEATURES
鈥?/div>
Pin to pin compatible to ST16C550, ST16C650A
and TL16C750
鈥?/div>
128-byte Transmit and Receive FIFOs
鈥?/div>
Transmit/Receive FIFO Counters
鈥?/div>
Programmable TX/RX FIFO Trigger Levels
鈥?/div>
Automatic Hardware/Software Flow Control
鈥?/div>
RS-485 half duplex direction support
鈥?/div>
Programmable Xon/Xoff characters
鈥?/div>
Infrared (IrDA) Transmit and Receive Encoder/
Decoder
鈥?/div>
Sleep Mode (100 uA stand-by)
鈥?/div>
Small 7x7mm TQFP
鈥?/div>
+5 or 3.3 Volts operation
鈥?/div>
Windows
2
and Linux drivers available
APPLICATIONS
鈥?/div>
Battery Operated Electronics
鈥?/div>
Internet Appliances
鈥?/div>
Handheld Terminal
鈥?/div>
Personal Digital Assistants
鈥?/div>
Cellular Phones DataPort
鈥?/div>
Wireless Infrared Data Communications Systems
F
IGURE
1. B
LOCK
D
IAGRAM
R ESET
128 B yte TX FIFO
A 2:A 0
D 7:D 0
IO R#
IO R
IO W #
IO W
C S2#
C S1
C S0
IN T
TXR D Y #
R XR D Y#
D D IS#
BRG
Prescaler
PC M O D E#
S1
S2
S3
IR Q A
IR Q B
IR Q C
B aud R ate G enerator
PC Mode:
C O M 1 to 4
D ecode Logic
XTA L1/C LK
XTA L2
Intel or
PC Data
B us
Interface
UART
C onfiguration
R egs
C TS Flow
C ontrol
D TR #, R TS#
M odem C ontrol Signals
R TS Flow
C ontrol
D SR #, C TS #,
C D #, R I#
Infrared
D ecoder
RX
Transm itter
Infrared Encoder and
Pulse W idth C ontrol
TX
R eceiver
128 B yte R X FIFO
C rystal O sc/B uffer
EXAR
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com
鈥?/div>
uarttechsupport@exar.com

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