Dual Monolithic CMOS/DMOS
T Configuration Analog Switch
CORPORATION
CWB5341
FEATURES
DESCRIPTION
The CWB5341 is a Dual Monolithic Analog Switch. Designed
utilizing "T" switching techniques this device gives
exceptionally low crosstalk and very high OFF isolation. The
CWB5341 is built on the Calogic proprietary CMOS/DMOS
process to achieve TTL compatibility with ultra low
capacitance and superior switching performance.
ORDERING INFORMATION
Part
Package
Temperature Range
CWB5341CP Plastic 14-Pin Dip
0 to +85
o
C
CWB5341CY Plastic SO-14 Surface Mount 0 to +85
o
C
XCWB5341 Sorted Chips in Carriers
0 to +85
o
C
鈥?/div>
Ultra High OFF Isolation . . . . . . . . . . . . > 80dB @ 10MHz
鈥?/div>
Low Channel-to-Channel Cross Talk . . . > 80dB @ 10MHz
鈥?/div>
TTL Compatible Inputs. . . . . . . . . . . . . . . . . . . < 100ohms
鈥?/div>
Low ON Resistance . .
鈥?/div>
Wide Bandwidth. . . . . . . . . . . . . . . . . . . -1.0dB @ 50MHz
鈥?/div>
RF and Video Switching
鈥?/div>
High Frequency Cross Points
鈥?/div>
Video Routing
鈥?/div>
Data Acquisition
PIN CONFIGURATION
APPLICATIONS
FUNCTION DIAGRAM
V+
COMMON 1
D1
GND
D2
V-
COMMON 2
1
2
3
4
5
6
7
CWB5341CP
14 S1
13 COMMON 1
S1
D1
COMMON 1
12 IN1
11 N/C
10 IN2
9
8
S2
IN1
GND
S2
D2
C0MM0N 2
N/C
IN2
Two SPST 'T' Switches per Package.
Switches shown in Logic '0' Input Position.
Compensation Networks can be connected to Common 1 and Common 2.
V+
COMMON 1
D1
GND
D2
V-
COMMON 2
1
2
3
4
5
6
7
CWB5341CY
14
13
12
11
10
9
8
S1
COMMON 1
IN1
N/C
IN2
S2
N/C
All devices contain diodes to protect inputs against damage due to
high static voltages or electric fields; however, it is advised that
precautions be taken not to exceed the maximum recommended
input voltages. All unused inputs must be connected to an
appropriate logic level (either V
cc
or GND).
CWB
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1
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3
