音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

X5643S14-1.8 Datasheet

  • X5643S14-1.8

  • SPI Serial EEPROM with Supervisory Features

  • 22頁(yè)

  • ETC

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

Replaces X25643/X25645
X5643/X5645
CPU Supervisor with 64Kb SPI EEPROM
FEATURES
鈥?Selectable Watchdog Timer
鈥?Low V
CC
Detection and Reset Assertion
鈥擣ive standard reset threshold voltages
鈥擱e-program low V
CC
reset threshold voltage
using special programming sequence
鈥擱eset signal valid to V
CC
=1V
鈥?Determine Watchdog or Low Voltage Reset with a
Volatile Flag bit
鈥?Long Battery Life With Low Power Consumption
鈥?lt;50碌A(chǔ) max standby current, watchdog on
鈥?lt;1碌A(chǔ) max standby current, watchdog off
鈥?lt;400碌A(chǔ) max active current during read
鈥?64K Bits of EEPROM
鈥?Built-In Inadvertent Write Protection
鈥擯ower-up/power-down protection circuitry
鈥擯rotect 0, 1/4, 1/2 or all of EEPROM array with
Block Lock
鈩?/div>
protection
鈥擨n circuit programmable ROM mode
鈥?2MHz SPI Interface Modes (0,0 & 1,1)
鈥?Minimize EEPROM Programming Time
鈥?2 byte page write mode
鈥擲elf-timed write cycle
鈥?ms write cycle time (typical)
鈥?1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power
Supply Operation
鈥?Available Packages
鈥?-lead PDIP, 14-lead SOIC, 20-lead TSSOP
BLOCK DIAGRAM
Watchdog Transition
Detector
WP
SI
SO
SCK
CS/WDI
Data
Register
Command
Decode &
Control
Logic
V
CC
Threshold
Reset logic
Protect Logic
RESET/RESET
Status
Register
EEPROM Array
16K Bits
16K bits
32K bits
Reset &
Watchdog
Timebase
Watchdog
Timer Reset
DESCRIPTION
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervi-
sion, and Block Lock
鈩?/div>
Protect Serial EEPROM Memory
in one package. This combination lowers system cost,
reduces board space requirements, and increases reli-
ability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontrol-
ler fails to restart a timer within a selectable time-out
interval, the device activates the RESET/RESET signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even after
cycling the power.
The device鈥檚 low V
CC
detection circuitry protects the
user鈥檚 system from low voltage conditions, resetting the
system when V
CC
falls below the minimum V
CC
trip
point. RESET/RESET is asserted until V
CC
returns to
proper operating level and stabilizes. Five industry stan-
dard V
TRIP
thresholds are available, however, Xicor鈥檚
unique circuits allow the thresold to be reprogrammed
to meet custom requirements or to 鏗乶e-tune the thresh-
old for applications requiring higher precision.
X5643 = RESET
X5645 = RESET
V
CC
V
TRIP
餂?/div>
Xicor, Inc. 2000 Patents Pending
9900-3002.5 3/31/00 EP
+
-
Power On and
Low Voltage
Reset
Generation
Characteristics subject to change without notice.
1 of 22

X5643S14-1.8相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 64Kbit SPI EEPROM
    INTERSIL [...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！