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X4165 Datasheet

  • X4165

  • 23頁(yè)

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64K
X46402
Dual Voltage CPU Supervisor with 64K Password Protected EEPROM
DESCRIPTION
The X46402 combines several functions into one
device. The 鏗乺st is a dual voltage CPU supervisor plus
64Kbit serial EEPROM memory with password pro-
tected write and read operations. The size of the pass-
word protected area is selectable by 3 control bits. A
Write Protect (WP) pin in conjunction with a WPEN bit
provides hardware OTP control of the con鏗乬uration of
the array. Password protected areas require 64 bit
read or write passwords prior to access.
A secondary voltage monitor circuit activates a V2FAIL
pin when the secondary supply voltage drops below a
V2trip voltage. This circuit is primarily intended to
detect the immediate loss of the battery supply.
A low V
CC
voltage detect circuit activates a RESET pin
when V
CC
drops below a V
TRIP
voltage. This signal
also blocks read or write operations.
A watchdog timer with the time period controlled by
three bits provides several possible time out periods
from 150ms to 1 minute.
FEATURES
鈥?Dual Voltage Detection and Reset Assertion
鈥擫ow V
CC
monitor
鈥擫ow V2MON monitor
鈥擫ow V
CC
block of EEPROM writes
鈥擱ESET signal valid down to V
CC
=1V
鈥?Selectable Watchdog Timer
鈥?50ms, 450ms, 1s, 5s, 10s, 20s, 1min, OFF
鈥?Volatile Flag Shows Watchdog/Low Voltage Reset
鈥?64kbit 2-Wire Serial EEPROM
鈥?MHz serial interface speed
鈥?4-byte page write mode
鈥?Two 64-Byte OTP Memory Blocks
鈥擱equires 64-bit OTP password to write
鈥?Adjustable Size Password Protected Array
鈥?4 bit read and write array passwords
鈥擭on-password protected array area
鈥?8 Count Tamper Counter for Invalid Passwords
鈥?Operates at 2.5-3.7V
鈥?8L TSSOP package
BLOCK DIAGRAM
WP
Write Control
Password Logic
HV Generation
Timing and Control
Write Password Area
(Bytes)
(64, 128, 256, 512,
2K, 4K, All, None)
No Password Area
Control
OTP array 1
OTP array 2
Passwords
Y Decoder
Data Register
(V
CC
) Control Signal
EEPROM
Array (64Kbits)
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Reset
Generation
V2FAIL
+
-
RESET
SCL
SDA
Command
Decode
and
Control
Logic
X Decoder
V2MON
V
2TRIP
V
CC
V
TRIP
+
-
餂?/div>
Xicor, Inc. 2000 Patents Pending
9900-3003.5 5/30/00 EP
Characteristics subject to change without notice.
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