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X40620 Datasheet

  • X40620

  • Dual Voltage CPU Supervisor with 64K Serial EEPROM

  • 17頁(yè)

  • XICOR   XICOR

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64K
X40620
Dual Voltage CPU Supervisor with 64K Serial EEPROM
EEPROM memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying voltage to V
CC
activates the power on reset
circuit which holds RESET active for a period of time.
This allows the power supply and system oscillator to
stabilize before the processor can execute code.
Low V
CC
detection circuitry protects the user鈥檚 system
from low voltage conditions, resetting the system when
V
CC
falls below the set minimum Vtrip point. RESET is
active until V
CC
returns to proper operating level and
stabilizes.
A second voltage monitor circuit (V2MON) tracks the
unregulated supply to provide a power fail warning or
monitors different power supply voltage. When the
second monitored voltage drops below a preset
V2
TRIP
voltage. V2FAIL is active until V2 returns to
proper operating level and above the V2
TRIP
voltage.
Five common low voltage combinations are available,
however, Xicor鈥檚 unique circuits allows the threshold
for either voltage monitor to be reprogrammed to meet
special needs or to 鏗乶e-tune the threshold for applica-
tions requiring higher precision.
FEATURES
鈥?Dual Voltage Detection and Reset Assertion
鈥擳hree standard reset threshold settings. (3.1V/
2.6V, 3.1V/1.7V, 2.9V/2.3V)
鈥擜djust low voltage reset threshold voltages
using special programming sequence
鈥擱ESET signal valid down to V
CC
=1V
鈥?Watchdog Timer (150ms)
鈥?Power On Reset (150ms)
鈥?Low Power CMOS
鈥?0碌A(chǔ) typical standby current, watchdog on
鈥?00碌A(chǔ) typical standby current, watchdog off
鈥?64kbit 2-Wire Serial EEPROM
鈥?MHz serial interface speed
鈥?4-byte page write mode
鈥擲elf-timed write cycle
鈥?ms write cycle time (typical)
鈥?2.5 to 3.7V Power Supply Operation
鈥?8-Lead TSSOP package
DESCRIPTION
The X40620 combines several functions into one
device. The 鏗乺st is a dual voltage monitoring, power-on
reset control, watchdog timer and 64Kbit serial
BLOCK DIAGRAM
WP
Write Control
Logic
HV Generation
Timing and Control
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Reset
Generation
V2FAIL
+
-
RESET
SCL
SDA
Command
Decode
and
Control
Logic
X Decoder
EEPROM Array
(64Kbits)
V2MON
V
2TRIP
V
CC
V
TRIP
(V
CC
) Control Signal
Y Decoder
Data Register
+
-
餂?/div>
Xicor, Inc. 2000 Patents Pending
9900-3003.5 4/24/00 EP
Characteristics subject to change without notice.
1 of 17

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  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR [Xic...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR [Xic...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL [...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL [...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR [Xic...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR [Xic...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL [...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    XICOR [Xic...
  • 英文版
    Dual Voltage CPU Supervisor with 64K Serial EEPROM
    INTERSIL [...

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