廬
X40231, X40233, X40235, X40237, X40239
Integrated System Management IC
Data Sheet
April 11, 2005
FN8115.0
Triple Voltage Monitors, POR, 2 kbit
EEPROM Memory, and Single/Dual DCP
FEATURES
鈥?Triple Voltage Monitors
鈥擴(kuò)ser Programmable Threshold Voltage
鈥擯ower-on Reset (POR) Circuitry
鈥擲oftware Selectable Reset timeout
鈥擬anual Reset Input
鈥?2-Wire industry standard Serial Interface
鈥?2 kbit EEPROM with Write Protect & Block Lock
TM
鈥?Digitally Controlled Potentiometers (DCP)
X4023X Family Selector Guide
X= 256 tap 100 tap 64 Tap
1
3
5
7
9
1
1
1
1
1
1
1
DESCRIPTION
The X4023x family of Integrated System Manage-
ment ICs combine CPU Supervisor functions (V
CC
Power-onpower-on Reset (POR) circuitry, two addi-
tional programmable voltage monitor inputs with soft-
ware and hardware indicators), integrated EEPROM
with Block Lock
TM
protection and one or two Intersil
Digitally Controlled Potentiometers (XDCP). All func-
tions of the X4023x are accessed by an industry
standard 2-Wire serial interface.
APPLICATIONS
The DCP of the X4023x may be utilized to software
control analog voltages for:
鈥?LCD contrast, LCD purity, or Backlight control.
鈥?Power Supply settings such as PWM frequency,
Voltage Trimming or Margining (temperature offset
control).
鈥?Reference voltage setting (e.g. DDR-SDRAM SSTL-2)
The 2 kbit integrated EEPROM may be used to store
ID, manufacturer data, maintenance data and module
definition data.
The programmable POR circuit insures V
CC
is stable
before RESET is removed and protects against
brown-outs and power failures. The programmable
voltage monitors have on-chip independent reference
alarm levels. With separate outputs, the voltage moni-
tors can be used for power-on sequencing.
鈥擳otal Resistance
256 Tap = 100k鈩? 100 Tap or 64 Tap = 10k鈩?/div>
鈥擭onvolatile wiper position
鈥擶rite Protect Function
鈥?Single Supply Operation
鈥?.7V to 5.5V
鈥?16 Pin SOIC (300) package
鈥擲OIC
BLOCK DIAGRAM
8
WP
R
H
PROTECT LOGIC
WIPER
COUNTER
REGISTER
R
W
256 Tap DCP
SDA
DATA
REGISTER
COMMAND
DECODE &
CONTROL
LOGIC
THRESHOLD
RESET LOGIC
CR
REGISTER
4
8 - BIT
NONVOLATILE
MEMORY
SCL
2 kbit
EEPROM
ARRAY
WIPER
COUNTER
REGISTER
R
H
R
W
Optional
64 or 100 Tap DCP
Manual Reset (MR)
2
-
+
8 - BIT
NONVOLATILE
MEMORY
V3MON
VTRIP
3
V2MON
VTRIP
2
V
CC
V
SS
VTRIP
1
V3FAIL
-
+
V2FAIL
+
鈥?/div>
POWER-ON /
LOW VOLTAGE
RESET
GENERATION
RESET
漏2000 Intersil Inc., Patents Pending (VTRIP
1,2,3
are user programmable)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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