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X28LV010PI-90 Datasheet

  • X28LV010PI-90

  • x8 EEPROM

  • 18頁

  • ETC

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1M
X28LV010
3.3 Volt, Byte Alterable E
2
PROM
128K x 8 Bit
FEATURES
鈥?Access Time: 70, 90, 120, 150ns
鈥?Simple Byte and Page Write
鈥擲ingle 3.3V鹵10% supply
鈥擭o external high voltages or V
PP
control circuits
鈥擲elf-timed
鈥?no erase before write
鈥?no complex programming algorithms
鈥?no overerase problem
鈥?Low Power CMOS
鈥擜ctive: 20mA
鈥擲tandby: 20碌A
鈥?Software Data Protection
鈥擯rotects data against system level inadvertant
writes
鈥?High Speed Page Write Capability
鈥?Highly Reliable Direct Write
鈩?/div>
Cell
鈥擡ndurance: 100,000 write cycles
鈥擠ata retention: 100 Years
鈥?Early End of Write Detection
鈥擠ATA polling
鈥擳oggle bit polling
BLOCK DIAGRAM
DESCRIPTION
The Xicor X28LV010 is a 128K x 8 E
2
PROM, fabri-
cated with Xicor's proprietary, high performance, 鏗俹at-
ing gate CMOS technology. Like all Xicor
programmable non-volatile memories the X28LV010
requires a single voltage supply. The X28LV010 fea-
tures the JEDEC approved pinout for byte-wide memo-
ries, compatible with industry standard EPROMs.
The X28LV010 supports a 256-byte page write opera-
tion, effectively providing a 12碌s/byte write cycle and
enabling the entire memory to be typically written in
less than 2.5 seconds. The X28LV010 also features
DATA Polling and Toggle Bit Polling, system software
support schemes used to indicate the early completion
of a write cycle. In addition, the X28LV010 supports
Software Data Protection option.
Xicor E
2
PROMs are designed and tested for applica-
tions requiring extended endurance. Data retention is
speci鏗乪d to be greater than 100 years.
A
8
鈥揂
16
X Buffers
Latches and
Decoder
1M-Bit
E
2
PROM
Array
A
0
鈥揂
7
Y Buffers
Latches and
Decoder
I/O Buffers
and Latches
I/O
0
鈥揑/O
7
Data Inputs/Outputs
CE
OE
WE
V
CC
V
SS
Control
Logic and
Timing
餂?/div>
Xicor, Inc. 2000 Patents Pending
2000-4003 9/6/00 EP
Characteristics subject to change without notice.
1 of 18

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