White Electronic Designs
16Mx32 SDRAM
FEATURES
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40% Space Savings vs. Monolithic Solution
Reduced System Inductance and Capacitance
3.3V Operating Supply Voltage
Fully Synchronous to Positive Clock Edge
Clock Frequencies of 100MHz - 133MHz
Burst Operation
聲 Sequential or Interleave
聲 Burst Length = Programmable 1, 2, 4, 8
or Full Page
聲 Burst Read and Write
聲 Multiple Burst Read and Single Write
Preliminary
WED3DL3216V
DESCRIPTION
The WED3DL3216V is an 16Mx32 Synchronous DRAM
configured as 4x4Mx32. The SDRAM BGA is constructed
with two 16Mx16 SDRAM die mounted on a multi-layer
laminate substrate and packaged in a 119 lead, 17mm
by 23mm, BGA.
The WED3DL3216V is available in clock speeds of
133MHz, 125MHz, and 100MHz. The range of operat-
ing frequencies, programmable burst lengths and pro-
grammable latencies allow the same device to be use-
ful for a variety of high bandwidth, high performance
memory system applications.
The package and design provides performance en-
hancements via a 50% reduction in capacitance vs.
two monolithic devices. The design includes internal
ground and power planes which reduces inductance
on the ground and power pins allowing for improved
decoupling and a reduction in system noise.
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Data Mask Control Per Byte
Auto and Self Refresh
Automatic and Controlled Precharge Commands
Suspend Mode and Power Down Mode
119 Pin BGA, 17mm x 23mm
FIG. 1 PIN CONFIGURATION
(T
OP VIEW
)
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
DDQ
NC
NC
DQ
C
DQ
C
V
DDQ
DQ
C
DQ
C
V
DDQ
DQ
D
DQ
D
V
DDQ
DQ
D
DQ
D
NC
NC
V
DDQ
1
2
NC
NC
NC
NC
DQ
C
DQ
C
DQ
C
DQ
C
V
DD
DQ
D
DQ
D
DQ
D
DQ
D
NC
A
6
NC
NC
2
3
BA
0
A
12
BA
1
V
SS
V
SS
V
SS
DQMC
V
SS
NC
V
SS
DQMD
V
SS
V
SS
V
SS
NC
A
5
NC
3
4
NC
CAS
V
DD
NC
CE
RAS
NC
CKE
V
DD
CLK
NC
WE
A
1
A
0
V
DD
A
4
NC
4
5
A
10
A
11
A
9
V
SS
V
SS
V
SS
DQMB
V
SS
NC
V
SS
DQMA
V
SS
V
SS
V
SS
NC
A
3
NC
5
6
A
7
NC
A
8
NC
DQ
B
DQ
B
DQ
B
DQ
B
V
DD
DQ
A
DQ
A
DQ
A
DQ
A
NC
A
2
NC
NC
6
7
V
DDQ
NC
NC
DQ
B
DQ
B
V
DDQ
DQ
B
DQ
B
V
DDQ
DQ
A
DQ
A
V
DDQ
DQ
A
DQ
A
NC
NC
V
DDQ
7
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
PIN DESCRIPTION
A
0
聳 A
12
BA
0-1
DQ
CLK
CKE
DQM
RAS
CAS
CE
V
DD
V
DDQ
V
SS
Address Bus
Bank Select Addresses
Data Bus
Clock
Clock Enable
Data Input/Output Mask
Row Address Strobe
Column Address Strobe
Chip Enable
Power Supply pins, 3.3V
Data Bus Power Supply pins,3.3V
Ground pins
May 2002, Rev. 0
ECO# 15233
1
White Electronic Designs Corporation 聲 (508) 366-5151 聲 www.whiteedc.com