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WC32P040-XP4M Datasheet

  • WC32P040-XP4M

  • 68000 Processors

  • 22頁(yè)

  • ETC

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WC32P040-XXM
68040 FEATURES
s
Selection of Processor Speeds: 25, 33MHz
s
Military Temperature Range: - 55擄C to +125擄C
s
Packaging
鈥?179 pin Ceramic PGA (P4)
鈥?184 lead Ceramic Quad Flatpack, CQFP (Q4)
s
6-Stage Pipeline, 68030-Compatible IU
s
68881/68882-Compatible FPU
s
Independent Instruction and Data MMUs
s
Simultaneously Accessible, 4-Kbyte Physical Instruction
Cache and 4-Kbyte Physical Data Cache
s
Low-Latency Bus Acceses for Reduced Cache Miss Penalty
s
Multimaster/Multiprocessor Support via Bus Snooping
s
Concurrent IU, FPU, MMU, and Bus Controller Operation
Maximizes Throughput
s
32-Bit, Nonmultiplexed External Address and Data Buses
with Synchronous Interface
s
User Object-Code Compatible with all Earlier 68000
Microprocessors
s
4-GigaByte Direct Addressing Range
DESCRIPTION
The WC32P040 is a 68000-compatible, high-performance, 32-
bit microprocessor. The WC32P040 is a virtual memory
microprocessor employing multiple concurrent execution units
and a highly intergrated architecture that provides very high
performance in a monolithic HCMOS device. It has a 68030-
compatible integer unit (IU) and two independent caches. The
WC32P040 contains dual, independent, demand-paged memory
management units (MMUs) for instruction and data stream
accesses and independent, 4-Kbyte instruction and data
caches. The WC32P040 has a 68881/68882-compatible
floating-point unit (FPU).
FIG. 1
BLOCK DIAGRAM
July 1998
1
White Microelectronics 鈥?Phoenix, AZ 鈥?(602) 437-1520

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