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WC32P020-XXM Datasheet

  • WC32P020-XXM

  • 16 32-Bit General-Purpose Data and Address Registers

  • 14頁

  • WEDC

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White Electronic Designs
68020 FEATURES
Selection of Processor Speeds: 16.67, 20, 25 MHz
Military Temperature Range: -55擄C to +125擄C
Packaging
鈥?114 pin Ceramic PGA (P2)
鈥?132 lead Ceramic Quad Flatpack, CQFP (Q2)
Object-code compatible with earlier 68000
Microprocessors
Addressing mode extensions for enhanced support
of high-level languages
Bit Field Data Type Accelerates Bit-Oriented
Applications鈥搃.e., Video Graphics
Fast On-Chip Instruction Cache Speeds
Instructions and Improves Bus Bandwidth
Coprocessor Interface to Companion 32-Bit
Peripherals鈥搕he 68881 and 68882 Floating-Point
Coprocessors and the 68851 Paged Memory
Management Unit
Pipelined Architecture with High Degree of Internal
Parallelism allowing Multiple Instructions to be
executed concurrently
WC32P020-XXM
High-Performance Asynchronous Bus Is
Nonmultiplexed and Full 32-Bits
Dynamic Bus Sizing Ef鏗乧iently Supports 8-/16-/32-
Bit Memories and Peripherals
Full Support of Virtual Memory and Virtual Machine
16 32-Bit General-Purpose Data and Address
Registers
Two 32-Bit Supervisor Stack Pointers and Five
Special-Purpose Control Registers
18 Addressing Modes and 7 Data Types
4 GigaByte Direct Addressing Range
DESCRIPTION
The WC32P020 is a 32-bit implementation of the 68000
Family of microprocessors. Using HCMOS technology,
the WC32P020 is implemented with 32-bit registers and
data paths, 32-bit addresses, a powerful instruction set,
and 鏗俥xible addressing modes.
FIGURE 1 鈥?BLOCK DIAGRAM
MICRO MACHINE
SEQUENCER
MICROROM
NANOROM
INSTRUCTION DECODE
CONTROL SECTION
INSTRUCTION PIPE
TAG
CACHE
EXECUTION UNIT
INSTRUCTION OPERAND
DATA
ADDRESS
ADDRESS
SECTION
SECTION
SECTION
INSTRUCTION
CACHE
ADDRESS
PADS
BUS
CONTROLLER
DATA
PADS
BUS CONTROLLER
White Electronic Designs Corp. reserves the right to change products or speci鏗乧ations without notice.
December 2002
Rev. 2
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.wedc.com

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