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W986432AH Datasheet

  • W986432AH

  • 512K x 4 BANKS x 32 BITS SDRAM

  • 1343.70KB

  • 44頁

  • WINBOND

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W986432AH
512K
脳
4 BANKS
脳
32 BITS SDRAM
GENERAL DESCRIPTION
W986432AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
512K words
脳
4 banks
脳
32 bits. Using pipelined architecture and 0.20
碌m
process technology,
W986432AH delivers a data bandwidth of up to 732M bytes per second (-55). For different
application, W986432AH is sorted into four speed grades: -55, -6, -7 and -8.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W986432AH is ideal for main memory in
high performance applications.
FEATURES
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3.3V 鹵0.3V power supply
524288 words
脳
4 banks
脳
32 bits organization
Auto Refresh and Self Refresh
CAS latency: 2 and 3
Burst Length: 1, 2, 4, 8, and full page
Sequential and Interleave burst
Burst read, single write operation
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Byte data controlled by DQM
Power-down Mode
Auto-precharge and controlled precharge
4K refresh cycles/64 mS
Interface: LVTTL
Packaged in 86-pin TSOP II, 400 mil - 0.50
PIN CONFIGURATION
DQM1
DQM3
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
45
42
DQ23
V
CC
Q
V
CC
Q
V
CC
Q
V
CC
Q
V
SS
Q
V
SS
Q
V
SS
Q
V
SS
Q
DQ9
DQ8
CKE
CLK
V
SS
V
SS
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
VSSQ
A10/AP
DQM0
DQM2
V
CC
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
VCC
VCC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CAS
RAS
V
CC
Q
V
SS
Q
V
CC
Q
V
SS
Q
V
SS
Q
-1-
Publication Release Date: December 1999
Revision A1
V
CC
Q
V
CC
Q
V
CC
BS0
BS1
NC
CS
NC
WE
NC
A0
A1
A2
43
2
3
4
5
6
7
8
1
9
44
V
SS
V
ss
NC
NC
NC
NC
A9
A8
A7
A6
A5
A4
A3

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