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W83194BR-63S Datasheet

  • W83194BR-63S

  • STEP-LESS CLOCK FOR SIS CHIPSET

  • 16頁

  • WINBOND

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W83194BR-63S
STEP-LESS CLOCK FOR SIS CHIPSET
Table of Content-
1.
2.
3.
4.
GENERAL DESCRIPTION ......................................................................................................... 2
PRODUCT FEATURES .............................................................................................................. 2
PIN CONFIGURATION ............................................................................................................... 3
PIN DESCRIPTION..................................................................................................................... 3
4.1
4.2
4.3
4.4
4.5
5.
6.
Crystal I/O ....................................................................................................................... 3
CPU, SDRAM, PCI ,AGP Clock Outputs........................................................................ 4
I2C Control Interface....................................................................................................... 5
Fixed Frequency Outputs ............................................................................................... 5
Power Pins...................................................................................................................... 5
FREQUENCY SELECTION BY HARDWARE ............................................................................ 6
SERIAL CONTROL REGISTERS............................................................................................... 6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
Register 0: Frequency Select Register........................................................................... 9
Register 1 : CPU Clock Register (1 = Active, 0 = Inactive) ............................................ 9
Register 2: PCI Clock Register (1 = Active, 0 = Inactive)............................................... 9
Register 3: SDRAM Clock Additional Register (1 = Active, 0 = Inactive)..................... 10
Register 4: PCI Clock Additional Register (1 = Active, 0 = Inactive)............................ 10
Register 5: Skew Register ............................................................................................ 10
Register 6: Watchdog Timer Register .......................................................................... 11
Register 7: M/N Program Register and Divisor ............................................................ 11
Register 8: M/N Program Register ............................................................................... 11
Register 9: Divisor Register .......................................................................................... 12
Register 10: Divisor Register........................................................................................ 12
Register 11: Winbond Chip ID Register
Register 12: Winbond Chip ID Register
(Read Only) ................................................ 12
(Read Only) ................................................ 13
7.
8.
9.
10.
ORDERING INFORMATION .................................................................................................... 14
HOW TO READ THE TOP MARKING...................................................................................... 14
PACKAGE DRAWING AND DIMENSIONS.............................................................................. 15
REVISION HISTORY ................................................................................................................ 16
-1-
Publication Release Date: May 19, 2005
Revision 1.0

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