鈥?/div>
Supports Pentium鈩? Pentium鈩?Pro, Pentium鈩?II, AMD and Cyrix CPUs with I
2
C.
4 CPU clocks.
12 SDRAM clocks for 3 DIMs.
7 PCI synchronous clocks.
One IOAPIC clock for multiprocessor support.
Optional single or mixed supply:
(Vdd = Vddq3 = Vddq2 = 3.3V) or (Vdd = Vddq3 = 3.3V, Vddq2 = 2.5V)
< 250ps skew among CPU and SDRAM clocks.
< 250ps skew among PCI clocks.
Smooth frequency switch with selections from 50 MHz to 83.3 MHz CPU.
I
2
C 2-Wire serial interface.
0.6% or 1.5% center type spread spectrum function to reduce EMI.
Programmable registers to enable/stop each output and select modes.
(mode as Tri-state, or Normal )
MODE pin for power Management.
48 MHz for USB.
24 MHz for super I/O.
48-pin SSOP package.
Publication Release Date: May 1998
Revision 0.20
-1-