Preliminary W83178S
100 MHZ 3-DIMM SDRAM BUFFER
1. GENERAL DESCRIPTION
The W83178S is a 13 outputs SDRAM clock buffer for 3-DIMMs models incorporate with W83196S-
14 which is the clock synthesizer especially for the 100 MHz models such as Intel BX chipsets. (Refer
the datasheet fo Winbond W83196S-14)
The W83178S receives the clock from chipset by the Buffer_In pin and provides almost zero-delay
(less than 4 nS propagation delay) SDRAM buffer outputs for the 13 SDRAM clocks which are
synchronous with the CPU clock outputs priovided by W83196S-14. The clock skew between any two
clock outputs is less than 250 pS and the output buffer impedance is about 15 ohms.
The W83178S also provides I
2
C serial bus interface to program the registers to enable or disable
each SDRAM clock outputs.
2. FEATURES
鈥?/div>
Supports Intel Pentium II CPUs for BX chipset
鈥?/div>
13 SDRAM clocks for 3-DIMMs
鈥?/div>
Clock skew less than 250 pS
鈥?/div>
Almost none delay Buffer-in controlling SDRAM clocks(<4 nS propagation delay)
鈥?/div>
I
2
C 2-wire serial interface
鈥?/div>
Programmable registers to enable/stop each output
鈥?/div>
Incorporate with W83196S-14
鈥?/div>
Packaged in 28-pin SOP
3. PIN CONFIGURATION
VDD
SDRAM 0
SDRAM 1
Vss
VDD
SDRAM 2
SDRAM 3
Vss
BUFFER_IN
SDRAM 4
SDRAM 5
SDRAM12
VDD
*SDATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
SDRAM11
SDRAM10
Vss
VDD
SDRAM 9
SDRAM 8
Vss
VDD
SDRAM 7
SDRAM 6
Vss
Vss
*SCLOCK
-1-
Publication Release Date: March 1999
Revision A1
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