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W78M64V-XSBX Datasheet

  • W78M64V-XSBX

  • Flash MCP

  • 2頁

  • ETC

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8M x 64 (64MB) Flash
Optimum Density and Performance
in One Package
W78M64V-XSBX* Features
The W78M64V-XSBX is member of WEDC鈥檚 high density/high
performance family of Flash MCPs.
Designed to complement high performance processors and
memory controllers. (See page 2 for typical block diagram).
Product Features
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64MByte (512Mb) organized as 8M x 64
Access Times of 70, 90, 100, 120ns
Page Mode Access Time: 25ns
Page Mode: 8 words fast page read access
Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in other bank
- Zero latency between read and write operations
Zero Power Operation
1,000,000 Erase/Program Cycles per sector
Flexible Bank Architecture
- Separate (4) banks provide up to two simultaneous
operations per device.
Boot Code Sector Architecture (Bottom or Top on same
device)
Single 3.3V for Read and Write Operations
I/O voltage options of 1.8V and 3.3V
Commercial and industrial temperature ranges
13 x 22mm, 159 Plastic Ball Grid Array (PBGA), 286mm2
* Preliminary flyer describes a product in development, non-qualified or characterized
and is subject to change without notice.
Benefits
鈥?31% space savings
鈥?Reduced part count
鈥?50% I/O reduction
鈥?Suitable for high-reliability
applications
鈥?Upgrade density from
W72M64V-XBX
鈥?Upgradeable (contact factory for
future availability)
Package
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For more information, visit our website at
www.whiteedc.com
or call (602) 437-1520
and ask for applications support.
White Electronic Designs

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