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W72M64V-XBX Datasheet

  • W72M64V-XBX

  • Flash MCP

  • 15頁

  • ETC

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W72M64V-XBX
2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package
*Preliminary
FEATURES
!
Access Times of 100, 120, 150ns
!
Packaging
!
Unlock Bypass Program command
鈥?159 PBGA, 13x22mm - 1.27mm pitch
!
1,000,000 Erase/Program Cycles
!
Sector Architecture
鈥?Reduces overall programming time when
issuing multiple program command sequences
!
Ready/Busy output (RY/BY)
鈥?Bank 1 (8Mb): eight 4K word, fifteen 32K word
鈥?Bank 2 (24Mb): forty-eight 32K word
!
Bottom boot block
!
Zero Power Operation
!
Organized as 2Mx64 or 2x2Mx32
!
Commercial, Industrial and Military Temperature
鈥?Hardware method for detecting program or erase
cycle completion
!
Hardware reset pin (RESET)
鈥?Hardware method of resetting the internal state
machine to the read mode
!
WP/ACC input pin
Ranges
!
3.3 Volt for Read and Write Operations
!
Simultaneous Read/Write Operation:
鈥?Write protect (WP) function allows protection of
two outermost boot sectors, regardless of
sector protect status
鈥?Acceleration (ACC) function accelerates
program timing
!
Sector Protection
鈥?Data can be continuously read from one bank
while executing erase/program functions in
another bank
鈥?Zero latency between read and write operations
!
Erase Suspend/Resume
鈥?Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within
that sector
鈥?Temporary Sector Unprotect allows changing
data in protected sectors in-system
Note: For programming information refer to Flash Programming
W72M64V-XBX Application Note.
鈥?Suspends erase operations to allow
programming in same bank
!
Data Polling and Toggle Bits
鈥?Provides a software method of detecting the
status of program or erase cycles
* Preliminary datasheet. This datasheet describes a product that is not characterized or qualified and is subject to
change without notice.
November 2003 Rev. 1
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.whiteedc.com

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